Virtual memory window with dynamic prefetching support
First Claim
1. Processing system comprising at least a central unit, a main memory and a peripheral, this peripheral accessing the memory at peripheral predefined addresses, and the central unit accessing the peripheral at central unit predefined addresses, wherein the access to the memory by the peripheral is made through an abstract identifier manager, said manager converting the peripheral predefined addresses to the central unit predefined addresses while accessing the memory, wherein it further comprises additional analysing means to predict useful data objects or fragments thereof for the peripheral and comprises additional buffer means in the shared memory to copy in advance such objects or fragments thereof to and from the shared memory.
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Abstract
Reconfigurable Systems-an-Chip (RSoCs) on the market consist of full-fledged processors and large Field-Programmable Gate Arrays (FPGAs). The latter can be used to implement the system glue logic, various peripherals, and application-specific coprocessors. Using FPGAs for application-specific coprocessors has certain speedup potentials, but it is less present in practice because of the complexity of interfacing the software application with the coprocessor. In the present application, we present a virtualisation layer consisting of an operating system extension and a hardware component. It lowers the complexity of interfacing and increases portability potentials, while it also allows the coprocessor to access the user virtual memory through a virtual memory window. The burden of moving data between processor and coprocessor is shifted from the programmer to the operating system.
26 Citations
6 Claims
- 1. Processing system comprising at least a central unit, a main memory and a peripheral, this peripheral accessing the memory at peripheral predefined addresses, and the central unit accessing the peripheral at central unit predefined addresses, wherein the access to the memory by the peripheral is made through an abstract identifier manager, said manager converting the peripheral predefined addresses to the central unit predefined addresses while accessing the memory, wherein it further comprises additional analysing means to predict useful data objects or fragments thereof for the peripheral and comprises additional buffer means in the shared memory to copy in advance such objects or fragments thereof to and from the shared memory.
Specification