WAFER LEVEL PROCESSING FOR BACKSIDE ILLUMINATED SENSORS

• US 20100006963A1
• Filed: 07/09/2008
• Published: 01/14/2010
• Est. Priority Date: 07/09/2008
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Brady, Frederick T.
• Granted Patent: US 7,859,033 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A backside illuminated image sensor comprises a sensor layer having a plurality of photosensitive elements of a pixel array, an oxide layer adjacent a backside surface of the sensor layer, and at least one dielectric layer adjacent a frontside surface of the sensor layer. A color filter array is formed on a backside surface of the oxide layer, and a transparent cover is attached to the backside surface of the oxide layer overlying the color filter array. Redistribution metal conductors are in electrical contact with respective bond pad conductors through respective openings in the dielectric layer. A redistribution passivation layer is formed over the redistribution metal conductors, and contact metallizations are in electrical contact with respective ones of the respective redistribution metal conductors through respective openings in the redistribution passivation layer. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Claims

1. A wafer level processing method for forming a plurality of image sensors each having a pixel array configured for backside illumination, the image sensors being formed utilizing an image sensor wafer, the image sensor wafer comprising a substrate, an oxide layer formed over the substrate, a sensor layer formed over the oxide layer, and one or more dielectric layers formed over the sensor layer, the sensor layer comprising photosensitive elements of the pixel arrays, the method comprising the steps of:

attaching a temporary carrier wafer to a frontside surface of said at least one dielectric layer;

removing the substrate to expose a backside surface of the oxide layer;

forming color filter arrays on the backside surface of the oxide layer;

attaching a transparent cover sheet comprising transparent covers overlying respective ones of the color filter arrays;

removing the temporary carrier wafer;

forming openings in said at least one dielectric layer to expose respective bond pad conductors;

forming redistribution metal conductors in electrical contact with the respective bond pad conductors through the respective openings;

forming a redistribution passivation layer over the redistribution metal conductors;

forming openings in the redistribution passivation layer to expose portions of respective ones of the redistribution metal conductors; and

forming contact metallizations in electrical contact with the respective redistribution metal conductors in respective ones of the openings in the redistribution passivation layer.

2. The method of claim 1 further comprising the step of separating a resulting processed wafer into the plurality of image sensors.

3. The method of claim 1 wherein each of the transparent covers comprises a central cavity arranged over its corresponding color filter array and further comprises peripheral supports secured to the backside surface of the oxide layer.

4. The method of claim 3 wherein the central cavity has a depth on the order of about 25 μ

m to 50 μ

m.

5. The method of claim 1 further comprising the step of forming microlenses over respective color filter elements of the color filter arrays.

6. The method of claim 1 further comprising the step of adding a protective film layer to the transparent cover sheet.

7. The method of claim 1 further including the step of attaching solder balls to respective ones of the contact metallizations formed in the respective openings in the redistribution passivation layer.

8. The method of claim 1 wherein the step of attaching the temporary carrier wafer to the frontside surface of said at least one dielectric layer further comprises the step of attaching the temporary carrier wafer using epoxy.

9. The method of claim 1 wherein the transparent cover sheet comprises a glass sheet.

10. The method of claim 1 wherein the contact metallizations comprise under-ball metallizations.

11. The method of claim 1 wherein said at least one dielectric layer comprises an interlayer dielectric and further comprises an intermetal dielectric separating multiple levels of metallization.

12. An image sensor having a pixel array configured for backside illumination, comprising:

a sensor layer comprising a plurality of photosensitive elements of the pixel array;

an oxide layer adjacent a backside surface of the sensor layer;

at least one dielectric layer adjacent a frontside surface of the sensor layer;

a color filter array formed on a backside surface of the oxide layer;

a transparent cover attached to the backside surface of the oxide layer and overlying the color filter array;

redistribution metal conductors in electrical contact with respective bond pad conductors through respective openings in said at least one dielectric layer;

a redistribution passivation layer formed over the redistribution metal conductors; and

contact metallizations in electrical contact with respective ones of the respective redistribution metal conductors through respective openings in the redistribution passivation layer.

13. The image sensor of claim 12 wherein the transparent cover comprises a central cavity arranged over the color filter array and further comprises peripheral supports secured to the backside surface of the oxide layer.

14. The image sensor of claim 12 further comprising solder balls attached to respective ones of the contact metallizations in the respective openings in the redistribution passivation layer.

15. The image sensor of claim 12 wherein the transparent cover comprises a glass cover.

16. The image sensor of claim 12 wherein the contact metallizations comprise under-ball metallizations.

17. The image sensor of claim 12 wherein said at least one dielectric layer comprises an interlayer dielectric and further comprises an intermetal dielectric separating multiple levels of metallization.

18. The image sensor of claim 12 wherein said image sensor comprises a CMOS image sensor.

19. A digital imaging device comprising:

an image sensor having a pixel array configured for backside illumination; and

one or more processing elements configured to process outputs of the image sensor to generate a digital image;

wherein said image sensor comprises;

a sensor layer comprising a plurality of photosensitive elements of the pixel array;

an oxide layer adjacent a backside surface of the sensor layer;

at least one dielectric layer adjacent a frontside surface of the sensor layer;

a color filter array formed on a backside surface of the oxide layer;

a transparent cover attached to the backside surface of the oxide layer and overlying the color filter array;

redistribution metal conductors in electrical contact with respective bond pad conductors through respective openings in said at least one dielectric layer;

a redistribution passivation layer formed over the redistribution metal conductors; and

contact metallizations in electrical contact with respective ones of the respective redistribution metal conductors through respective openings in the redistribution passivation layer.

20. The digital imaging device of claim 19 wherein said imaging device comprises a digital camera.