VSB TRANSMISSION SYSTEM
1 Assignment
0 Petitions
Accused Products
Abstract
A vestigial sideband (VSB) modulation transmission system and a method for encoding an input signal in the system are disclosed. According to the present invention, the VSB transmission system includes a convolutional encoder for encoding an input signal, a trellis-coded modulation (TCM) encoder for encoding the convolutionally encoded signal, and a signal mapper mapping the trellis-coded signal to generate a corresponding output signal. Different types of the convolutional encoders are explored, and the experimental results showing the performances of the VSB systems incorporating each type of encoders reveals that a reliable data transmission can be achieved even at a lower input signal to noise ratio when a convolutional encoder is used as an error-correcting encoder in a VSB system.
91 Citations
16 Claims
-
1-12. -12. (canceled)
-
13. A digital television (DTV) transmitter that processes digital broadcast data, the DTV transmitter comprising:
-
a first encoder for encoding first information having a first bit value to output second and third bit values; and a second encoder for encoding the second and third bit values, wherein the first encoder comprises a first memory, a second memory, and a first adder such that input bit values of the first adder are an output bit value of the first memory and the first bit value, an input bit value of the second memory is an output bit value of the first adder, and an input bit value of the first memory is an output bit value of the second memory, wherein the second encoder comprises a third memory, a fourth memory, and a second adder such that input bit values of the second adder are an output bit value of the third memory and the third bit value, an input bit value of the fourth memory is an output bit value of the second adder, and an input bit value of the third memory is an output bit value of the fourth memory, and wherein the first bit value is equal to the second bit value and the output bit value of the second memory is the third bit value.
-
-
14. A digital television (DTV) receiver that processes digital broadcast data, the DTV receiver comprising:
-
a receiving unit for receiving a digital broadcast signal processed by a DTV transmitter comprising a first encoder and a second encoder, the first encoder encoding first information having a first bit value to output second and third bit values, the second encoder encoding the second and third bit values; and a decoder for decoding the received digital broadcast signal, wherein the first encoder comprises a first memory, a second memory, and a first adder such that input bit values of the first adder are an output bit value of the first memory and the first bit value, an input bit value of the second memory is an output bit value of the first adder, and an input bit value of the first memory is an output bit value of the second memory, wherein the second encoder comprises a third memory, a fourth memory, and a second adder such that input bit values of the second adder are an output bit value of the third memory and the third bit value, an input bit value of the fourth memory is an output bit value of the second adder, and an input bit value of the third memory is an output bit value of the fourth memory, and wherein the first bit value is equal to the second bit value and the output bit value of the second memory is the third bit value.
-
-
15. A method of processing digital broadcast data in a digital television (DTV) transmitter, the method comprising:
-
encoding first information having a first bit value in a first encoder to output second and third bit values; and encoding the second and third bit values in a second encoder, wherein the first encoder comprises a first memory, a second memory, and a first adder such that input bit values of the first adder are an output bit value of the first memory and the first bit value, an input bit value of the second memory is an output bit value of the first adder, and an input bit value of the first memory is an output bit value of the second memory, wherein the second encoder comprises a third memory, a fourth memory, and a second adder such that input bit values of the second adder are an output bit value of the third memory and the third bit value, an input bit value of the fourth memory is an output bit value of the second adder, and an input bit value of the third memory is an output bit value of the fourth memory, and wherein the first bit value is equal to the second bit value and the output bit value of the second memory is the third bit value.
-
-
16. A method of processing digital broadcast data in a digital television (DTV) receiver, the method comprising:
-
receiving a digital broadcast signal in a receiving unit, the digital broadcast signal being processed by a DTV transmitter comprising a first encoder and a second encoder, the first encoder encoding first information having a first bit value to output second and third bit values, the second encoder encoding the second and third bit values; and decoding the received digital broadcast signal in a decoder, wherein the first encoder comprises a first memory, a second memory, and a first adder such that input bit values of the first adder are an output bit value of the first memory and the first bit value, an input bit value of the second memory is an output bit value of the first adder, and an input bit value of the first memory is an output bit value of the second memory, wherein the second encoder comprises a third memory, a fourth memory, and a second adder such that input bit values of the second adder are an output bit value of the third memory and the third bit value, an input bit value of the fourth memory is an output bit value of the second adder, and an input bit value of the third memory is an output bit value of the fourth memory, and wherein the first bit value is equal to the second bit value and the output bit value of the second memory is the third bit value.
-
Specification