Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device
First Claim
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1. An adapter board, comprising:
- a package substrate, including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface;
an insulating layer formed over said first surface of said package substrate;
a through hole formed in a position corresponding to said first land pad of said insulating layer;
a conductive member formed in said through hole;
a third land pad covering said through hole and having a bump side without being covered with the insulating layer; and
an external coupling terminal formed in said second land pad,wherein said first land pad is electrically coupled to said second land pad through said wiring, andwherein said third land pad is electrically coupled to said first land pad through said conductive member.
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Abstract
An adapter board includes a package substrate having a first surface and a second surface and further including a board having wirings formed therein, pads disposed in the device side, and the pads disposed in the bump side, an insulating resin layer joined to the first surface, through holes formed in the positions corresponding to the pads in the insulating resin layer, vias formed in the through holes, and pads covering the through holes, wherein the pads are electrically coupled to the pads through the wirings, and the pads are electrically coupled to the pads through the vias.
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Citations
19 Claims
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1. An adapter board, comprising:
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a package substrate, including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface; an insulating layer formed over said first surface of said package substrate; a through hole formed in a position corresponding to said first land pad of said insulating layer; a conductive member formed in said through hole; a third land pad covering said through hole and having a bump side without being covered with the insulating layer; and an external coupling terminal formed in said second land pad, wherein said first land pad is electrically coupled to said second land pad through said wiring, and wherein said third land pad is electrically coupled to said first land pad through said conductive member. - View Dependent Claims (2, 3, 4, 5, 6, 7)
wherein said first land pad contains a first testing-dedicated pad, wherein said first testing-dedicated pad is electrically coupled to said second testing-dedicated pad through said wiring, and wherein an external coupling terminal is formed in said second testing-dedicated pad. -
3. The adapter board as set forth in claim 1, wherein said third land pad is covered with an electroconductive protective film.
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4. The adapter board as set forth in claim 3, wherein said electroconductive protective film is a gold-plated film.
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5. The adapter board as set forth in claim 1, wherein said third land pad is protruded over the surface of said insulating layer.
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6. The adapter board as set forth in claim 1, wherein the dimensional area of said third land pad is larger than the dimensional area of said first land pad.
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7. The adapter board as set forth in claim 1, wherein an inter-pad distance for said second land pads is larger than an inter-pad distance for said first land pads, and an inter-pad distance for said third land pads is equivalent to an inter-pad distance for said first land pads.
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8. A probe card, being capable of electrically coupling a semiconductor wafer with an measuring apparatus, said semiconductor wafer having a large scale integrated circuit (LSI) formed therein, which is an object of a testing, and said measuring apparatus applying electrical signal to said LSI formed in said semiconductor wafer to measure electrical characteristics of said LSI formed in said semiconductor wafer, said probe card comprising:
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an adapter board, including; a package substrate, including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface; an insulating layer formed over said first surface of said package substrate; a through hole formed in a position corresponding to said first land pad of said insulating layer; a conductive member formed in said through hole; a third land pad covering said through hole and having a bump side without being covered with the insulating layer; and an external coupling terminal formed in said second land pad; and a probe, being electrically coupled to said third land pad and in contact with the land formed in said semiconductor wafer, wherein said first land pad is electrically coupled to said second land pad through said wiring, and said third land pad is electrically coupled to said first land pad through said conductive member. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for manufacturing an adapter board, comprising:
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preparing a package substrate including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface; forming an insulating layer in said first surface; forming a through hole in a position corresponding to said first land pad of said insulating layer; forming a conductive member in said through hole; covering said through hole with a third land pad; and forming an external coupling terminal in said second land pad, wherein said first land pad is electrically coupled to said second land pad through said wiring, and wherein said third land pad is electrically coupled to said first land pad through said conductive member, and has a bump side without being covered with the insulating layer. - View Dependent Claims (16)
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17. A method for inspecting a semiconductor wafer, using a probe card, being capable of electrically coupling a semiconductor wafer to an measuring apparatus, said semiconductor wafer having a large scale integrated circuit (LSI) formed therein, which is an object of a testing, and said measuring apparatus applying electrical signal to said LSI formed in said semiconductor wafer to measure electrical characteristics of said LSI formed in said semiconductor wafer, said probe card comprising:
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an adapter board, including a package substrate including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface; an insulating layer formed over said first surface of said package substrate; a through hole formed in a position corresponding to said first land pad of said insulating layer; a conductive member formed in said through hole; a third land pad covering said through hole and having a bump side without being covered with the insulating layer; and an external coupling terminal formed in said second land pad, said adapter board providing an electric coupling between said first land pad and said second land pad; and a probe, being electrically coupled to said third land pad and in contact with the land formed in said semiconductor wafer, wherein said method comprises; causing said probe in contact with the land provided in said semiconductor wafer; and applying electrical signal to said semiconductor wafer to measure electrical characteristics of said semiconductor wafer. - View Dependent Claims (18)
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19. A method for manufacturing a semiconductor device, comprising:
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preparing two package substrates, each including a board body having a first surface and a second surface and also having a wiring formed in the interior thereof, a first land pad disposed in said first surface and a second land pad disposed in said second surface; electrically coupling a semiconductor wafer to an measuring apparatus, said semiconductor wafer having a large scale integrated circuit (LSI) formed therein, which is an object of a testing, and said measuring apparatus applying electrical signal to said LSI formed in said semiconductor wafer to measure electrical characteristics of said LSI formed in said semiconductor wafer; inspecting said semiconductor wafer by using a probe card having one of said prepared two package substrates; dicing said semiconductor wafer into semiconductor elements containing said LSI; and packaging said semiconductor element over the other of said prepared two package substrates, wherein said probe card includes; an adapter board including; said one of the package substrates; an insulating layer formed over said first surface of said one of the package substrates; a through hole formed in the position corresponding to said first land pad of said insulating layer; a conductive member formed in said through hole; a third land pad covering said through hole and having a bump side without being covered with the insulating layer; and an external coupling terminal formed in said second land pad; and a probe, being electrically coupled to said third land pad included in said adapter board and in contact with the land formed in said semiconductor wafer; wherein said inspecting the semiconductor wafer includes; electrically coupling said third land pad to said land by causing said probe into contact with the land provided in said semiconductor wafer; and applying electrical signal from said measuring apparatus to said semiconductor wafer to measure electrical characteristics of said semiconductor wafer, wherein said packaging the semiconductor element includes; installing said semiconductor element in said first surface of said other package substrate and providing an electric coupling of said semiconductor element with the first land pad of said other package substrate; and forming an external coupling terminal over said second land pad of said other package substrate.
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Specification