PIXEL SENSOR CELL WITH FRAME STORAGE CAPABILITY
First Claim
1. A semiconductor structure for an image sensor pixel, said semiconductor structure comprising:
- a photosensitive diode structure;
a first transistor including a diffusion region and a first channel, wherein said diffusion region is a source region of said first transistor and is of integral construction with a terminal of said photosensitive diode structure;
a second transistor including a second channel located in proximity to said first channel, wherein said second channel is electrically coupled to said first channel to enable formation of a merged channel including said first channel and said second channel; and
a plurality of frame transfer transistors including a plurality of frame transfer channels, wherein each of said plurality of frame transfer transistors is serially connected among one another and comprises a gate electrode and a frame transfer channel, and wherein each of said plurality of frame transfer channels is located in proximity with another of said plurality of frame transfer channels to enable formation of a merged channel including two neighboring frame transistor channels.
7 Assignments
0 Petitions
Accused Products
Abstract
A set of frame transfer transistors are provided between a hold gate transistor and a transfer gate transistor of a CMOS image sensor to enable storage of charge generate in the photosensitive diode after exposure. The readout of the charges from the set of frame transfer transistors may be performed after a plurality of exposures of the CMOS image sensor, between each of which charges are shifted toward the transfer gate transistor within the set of frame transfer transistors. Useful operation modes are enabled including a burst mode operation for rapid capture of successive images and high dynamic range operations in which multiple images are taken with different exposure times or a large capacitance is provided by ganging the diffusions of the set of frame transfer transistors.
-
Citations
20 Claims
-
1. A semiconductor structure for an image sensor pixel, said semiconductor structure comprising:
-
a photosensitive diode structure; a first transistor including a diffusion region and a first channel, wherein said diffusion region is a source region of said first transistor and is of integral construction with a terminal of said photosensitive diode structure; a second transistor including a second channel located in proximity to said first channel, wherein said second channel is electrically coupled to said first channel to enable formation of a merged channel including said first channel and said second channel; and a plurality of frame transfer transistors including a plurality of frame transfer channels, wherein each of said plurality of frame transfer transistors is serially connected among one another and comprises a gate electrode and a frame transfer channel, and wherein each of said plurality of frame transfer channels is located in proximity with another of said plurality of frame transfer channels to enable formation of a merged channel including two neighboring frame transistor channels. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A semiconductor circuit for an image sensor pixel, said semiconductor circuit comprising:
-
a photosensitive diode; a first transistor having a first channel, wherein a source of said first transistor is a terminal of said photosensitive diode; a second transistor having a second channel which is configured to enable formation of a merged channel including said first channel and said second channel; and a plurality of frame transfer transistors including a plurality of frame transfer channels, wherein each of said plurality of frame transfer transistors is serially connected among one another and comprises a gate electrode and a frame transfer channel, and wherein each neighboring pair of said plurality of frame transfer channels is configured to enable formation of a merged channel including two neighboring frame transistor channels. - View Dependent Claims (8, 9, 10, 11, 12)
-
-
13. A design structure embodied in a machine readable medium for designing, manufacturing, or testing a design, said design structure comprising:
-
a first data representing a photosensitive diode; a second data representing a first transistor in direct serial connection with said photosensitive diode, wherein said first transistor having a first channel, and wherein a source of said first transistor is a terminal of said photosensitive diode; a third data representing a second transistor in direct serial connection with said first transistor, wherein said second transistor having a second channel configured to enable formation of a merged channel including said first channel and said second channel; and a fourth data representing a plurality of frame transfer transistors serially connected thereamongst and in direct serial connection with said second transistor. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
-
Specification