Hardware Switch for Hypervisors and Blade Servers
First Claim
1. A hardware switch for enabling communications with one or more guest operating systems (OSs) in one or more servers, comprising:
- a first memory configured for receiving a destination address (DA) and determining if the DA is accessible through the one or more servers;
a second memory coupled to the first memory and configured for receiving the DA and generating a routing rule to specify a route for the hardware switch if the DA is found in the first memory;
a third memory coupled to the first memory and configured for receiving a virtual local area network identifier (VLAN_ID) and generating a vector to specify a set of destination ports for the hardware switch if the DA is not found in the first memory; and
a fourth memory to configure a set of ports within a given VLAN to be used by the hardware switch for broadcast media access control (MAC) DAs.
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Accused Products
Abstract
A hardware switch for use with hypervisors and blade servers is disclosed. The hardware switch enables switching to occur between different guest OSs running in the same server, or between different servers in a multi-root IOV system, or between different guest OSs running in the same server in single-root IOV systems. Whether embedded in a host bus adapter (HBA), converged network adapter (CNA), network interface card (NIC) or other similar device, the hardware switch can provide fast switching with access to and sharing of at least one external network port such as a Fibre Channel (FC) port, 10 Gigabit Ethernet (10 GbE) port, FC over Ethernet (FCOE) port, or other similar port. The hardware switch can be utilized when no hypervisor is present or when one or more servers have hypervisors, because it allows for switching (e.g. Ethernet switching) between the OSs on a single hypervisor.
183 Citations
33 Claims
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1. A hardware switch for enabling communications with one or more guest operating systems (OSs) in one or more servers, comprising:
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a first memory configured for receiving a destination address (DA) and determining if the DA is accessible through the one or more servers; a second memory coupled to the first memory and configured for receiving the DA and generating a routing rule to specify a route for the hardware switch if the DA is found in the first memory; a third memory coupled to the first memory and configured for receiving a virtual local area network identifier (VLAN_ID) and generating a vector to specify a set of destination ports for the hardware switch if the DA is not found in the first memory; and a fourth memory to configure a set of ports within a given VLAN to be used by the hardware switch for broadcast media access control (MAC) DAs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method within a physical network interface card (pNIC) for enabling communications with one or more guest operating systems (OSs) in one or more servers, comprising:
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receiving a destination address (DA) and determining if the DA is accessible through the one or more servers; generating a routing rule to specify a route if the DA is accessible through the one or more servers; and receiving a virtual local area network (VLAN) number and generating a tuple to specify a broadcast route if the DA not accessible through the one or more servers. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A storage area network (SAN) including one or more servers, at least one of the servers having a physical network interface card (pNIC) including a hardware switch for enabling communications with one or more guest operating systems (OSs) in one or more of the servers, the hardware switch comprising:
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a first memory configured for receiving a destination address (DA) and determining if the DA is accessible through the one or more servers; a second memory coupled to the first memory and configured for receiving the DA and generating a routing rule to specify a route for the hardware switch if the DA is found in the first memory; and a third memory coupled to the first memory and configured for receiving a virtual local area network (VLAN) number and generating a tuple to specify a broadcast route for the hardware switch if the DA not found in the first memory.
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Specification