GAP PROCESSING

• US 20100015813A1
• Filed: 07/17/2008
• Published: 01/21/2010
• Est. Priority Date: 07/17/2008
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Joshi, Sachin, Lim, Chan, McGinnis, Arthur J.
• Granted Patent: US 8,058,138 B2
• Time in Patent Office: Days
• US Class Current: 438/771
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/31608 Deposition of SiO2 H01L21/31625, H01L21/31629 and H01L21/31633 take precedence
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 21/76885 By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

Abstract

Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.

Claims

1. A method of operating a chemical vapor deposition reactor comprising:

depositing a non-conformal first oxide precursor material using plasma-enhanced chemical vapor deposition on at least two conductive lines having at least one gap between the at least two conductive lines, wherein each conductive line has a top and at least one sidewall and each gap has a bottom of a particular depth separating sidewalls of the two conductive lines;

forming a breadloaf configuration with the non-conformal first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between the closest approach of adjacent breadloaf configurations; and

depositing a conformal second oxide precursor material on the at least two conductive lines, wherein depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.

2. The method of claim 1, wherein the method includes depositing a conformal second oxide precursor material containing oxygen in a molecular structure of the conformal second oxide precursor material.

3. The method of claim 2, wherein depositing the conformal second oxide precursor material includes heating the conformal second oxide precursor material to a temperature high enough to cause thermal decomposition of the conformal second oxide precursor material.

4. The method of claim 3, wherein heating the conformal second oxide precursor material includes converting the conformal second oxide precursor material into a substantially uniform silicon dioxide layer.

5. The method of claim 4, wherein the method includes causing at least some of a residual silicon-rich first oxide deposited by the non-conformal first oxide precursor material around the bottom and adjacent sidewalls of each gap to shift to a more uniform silicon dioxide layer.

6. The method of claim 2, wherein depositing the conformal second oxide precursor material includes using in situ steam generation to convert the conformal second oxide precursor material into a substantially uniform silicon dioxide layer.

7. The method of claim 6, wherein the method includes causing at least some of a residual silicon-rich first oxide deposited by the non-conformal first oxide precursor material around the bottom and adjacent sidewalls of each gap to shift to a more uniform silicon dioxide layer.

8. A method of forming a gap between circuitry comprising:

depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines;

forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations; and

depositing a second oxide precursor material over the first oxide precursor material, wherein depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.

9. The method of claim 8, wherein depositing the first oxide precursor material includes depositing a first oxide material having varying stoichiometries in oxygen content of molecules contributing to the first oxide material.

10. The method of claim 9, wherein the method includes performing a particular activity to change a stoichiometry of at least some of the deposited first oxide material after forming the breadloaf configuration.

11. The method of claim 10, wherein performing the particular activity to change the stoichiometry includes decreasing a relative dielectric constant of the first oxide material by changing relative oxygen content of at least some molecules contributing to the first oxide material.

12. The method of claim 8, wherein the method includes using at least two adjacent conductive lines each having a top and sidewalls, wherein each gap has a bottom between sidewalls of the adjacent conductive lines, and wherein a particular distance separates the top of each conductive line and the bottom of an adjacent gap.

13. The method of claim 12, wherein the method includes depositing a non-conformal first oxide precursor material to form a thicker deposit of a first oxide material around the top and adjacent sidewalls of the at least two adjacent conductive lines compared to a thickness around the bottom and the adjacent sidewalls of the gap.

14. The method of claim 13, wherein the method includes depositing a conformal second oxide precursor material over the first oxide material to close the space between the closest approach of the at least two adjacent breadloaf configurations.

15. The method of claim 14, wherein depositing the second oxide precursor material includes depositing a conformal oxide precursor material over the first oxide material to form a layer of a second oxide material around the bottom and adjacent sidewalls of the gap.

16. A medium including instructions stored thereon for executing performance of a method comprising:

depositing a first oxide precursor material on at least two conductive lines having at least one gap separating sidewalls of two adjacent conductive lines, wherein each conductive line has a top and at least one sidewall and each gap has a bottom of a particular depth separating sidewalls of the two conductive lines;

forming a breadloaf configuration with the first oxide precursor material on the top of each of the two adjacent conductive lines that leaves a space between the closest approach of the two adjacent breadloaf configurations; and

depositing a second oxide precursor material on the two adjacent conductive lines, wherein depositing the second oxide precursor material results in closing the space between the closest approach of the two adjacent breadloaf configurations.

17. The medium of claim 16, wherein the method includes depositing a second oxide precursor material selected from oxide precursor materials having essentially different molecular compositions compared to the first oxide precursor material.

18. The medium of claim 16, wherein the method includes using a first oxide precursor selected from silicon compositions lacking oxygen and using a second oxide precursor selected from silicon compositions containing oxygen.

19. The medium of claim 18, wherein using the first oxide precursor selected from silicon compositions lacking oxygen includes using silanes.

20. The medium of claim 18, wherein using the second oxide precursor selected from silicon compositions containing oxygen includes using tetraethyl orthosilicate.

21. The medium of claim 18, wherein the method includes exposing a first oxide layer formed from molecules contributed by the first oxide precursor to an oxygen-containing plasma to shift a silicon-rich mixture of the first oxide layer toward a more uniform silicon dioxide mixture.

22. The medium of claim 21, wherein exposing the first oxide layer to the oxygen-containing plasma includes exposing the first oxide layer before the space between the closest approach of the two adjacent breadloaf configurations is closed.

23. The medium of claim 18, wherein the method includes exposing a first oxide layer formed from molecules contributed by the first oxide precursor to an oxygen-containing gas and a temperature high enough to shift a silicon-rich mixture of the first oxide layer toward a more uniform silicon dioxide mixture.

24. The medium of claim 23, wherein exposing the first oxide layer to the oxygen-containing gas and the high temperature includes exposing the first oxide layer before the space between the closest approach of the two adjacent breadloaf configurations is closed.

25. The medium of claim 16, wherein depositing the second oxide precursor material includes depositing the second oxide precursor material selected from oxide precursor materials having essentially a same molecular composition as the first oxide precursor material.

26. The medium of claim 25, wherein the method includes selecting both the first and second oxide precursor materials from a same group, and wherein the groups consist of conformal oxide precursor materials and non-conformal oxide precursor materials.