DATA CONVERSION APPARATUS, DATA CONVERSION METHOD, AND COMPUTER-READABLE RECORDING MEDIUM STORING PROGRAM

• US 20100017761A1
• Filed: 07/15/2009
• Published: 01/21/2010
• Est. Priority Date: 07/18/2008
• Status: Active Grant

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Fujitsu Limited
• Inventors: Matsuyama, Manabu, Ohzeki, Ryuichi, HIGUCHI, Hayato, Suzuki, Toshihiro, Sutou, Shinichi, Tabaru, Tsuguchika
• Granted Patent: US 8,291,360 B2
• Time in Patent Office: Days
• US Class Current: 716/103
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A data conversion apparatus for converting circuit description related to a dynamically-reconfigurable circuit to circuit configuration information, the data conversion apparatus includes a first generation section that generates a data flow graph from the circuit description; a segment count determining section that determines a number of segments for segmenting the data flow graph generated by the first generation section; a virtual circuit creating section that creates a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined by the segment count determining section; a second generation section that generates, from the circuit description, a data flow graph corresponding to the virtual circuit created by the virtual circuit creating section; and a conversion section that allocates and adjusts the resources of the virtual circuit in accordance with the data flow graph.

Claims

1. A data conversion apparatus for converting an inputted circuit description related to a dynamically reconfigurable circuit to circuit configuration information, the data conversion apparatus comprising:

a first generation section that generates a data flow graph from the circuit description;

a segment count determining section that determines a number of segments for segmenting the data flow graph generated by the first generation section;

a virtual circuit creating section that creates a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined by the segment count determining section;

a second generation section that generates, from the circuit description, a data flow graph corresponding to the virtual circuit created by the virtual circuit creating section; and

a conversion section that allocates and adjusts the resources of the virtual circuit in accordance with the data flow graph generated by the second generation section to generate the circuit configuration information.

2. The data conversion apparatus according to claim 1, wherein adjustment performed by the conversion section in accordance with the data flow graph obtained by the second generation section includes at least one of:

timing adjustment relating to data input and output to and from the resources of the virtual circuit, adjustment of deployment of the resources for use, or adjustment of wiring related to the resources.

3. The data conversion apparatus according to claim 1, wherein the conversion section generates the circuit configuration information if a restriction of the dynamically-reconfigurable circuit is met as a result of the allocation and the adjustment of the resources of the virtual circuit in accordance with the data flow graph obtained by the second generation section.

4. The data conversion apparatus according to claim 3, wherein if the restrictions of the dynamically-reconfigurable circuit are not met as a result of the allocation and the adjustment of the resources of the virtual circuit in accordance with the data flow graph obtained by the second generation section, the conversion section increases the number of segments and again performs processing after determining the number of segments.

5. The data conversion apparatus according to claim 1, wherein the segment count determining section determines the number of segments in accordance with the resources of the dynamically-reconfigurable circuit.

6. The data conversion apparatus according to claim 5, wherein if the number of segments is externally specified, the segment count determining section adopts the specified number of segments.

7. A data conversion method for converting an inputted circuit description related to a dynamically-reconfigurable circuit to circuit configuration information, the data conversion method comprising:

a first generation process of generating a data flow graph from the circuit description;

a segment count determining process of determining the number of segments for segmenting the data flow graph generated in the first generation process;

a virtual circuit creating process of creating a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined in the segment count determining process;

a second generation process of generating, from the circuit description, a data flow graph corresponding to the virtual circuit created in the virtual circuit creating process; and

a conversion process of allocating and adjusting resources of the virtual circuit in accordance with the data flow graph generated in the second generation process to generate the circuit configuration information.

8. A computer-readable recording medium that stores therein a computer program for enabling a computer to execute:

a first generation step of generating a data flow graph from an inputted circuit description that is related to a dynamically-reconfigurable circuit;

a segment count determining step of determining the number of segments for segmenting the data flow graph generated in the first generation step;

a virtual circuit creating step of creating a virtual circuit that has as many resources of the dynamically-reconfigurable circuit as the number of the resources multiplied by the number of segments determined in the segment count determining step;

a second generation step of generating, from the circuit description, a data flow graph corresponding to the virtual circuit created in the virtual circuit creating step; and

a conversion step of allocating and adjusting resources of the virtual circuit in accordance with the data flow graph generated in the second generation step to generate circuit configuration information for the dynamically-reconfigurable circuit.