METHODS AND APPARATUS FOR INTEGRATED CIRCUIT HAVING ON CHIP CAPACITOR WITH EDDY CURRENT REDUCTIONS

• US 20100019332A1
• Filed: 07/24/2008
• Published: 01/28/2010
• Est. Priority Date: 07/24/2008
• Status: Active Grant

• Current Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Original Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Inventors: Taylor, William P.
• Granted Patent: US 8,093,670 B2
• Time in Patent Office: Days
• US Class Current: 257/427
• CPC Class Codes: G01R 33/07 Hall effect devices
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 52/00 Hall-effect devices integrated devices or assemblies of multiple devices H10N59/00
• CPC Class Codes: H10N 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00 MRAM devices H10B61/00

Abstract

Methods and apparatus for providing an integrated circuit including a substrate having a magnetic field sensor, first and second conductive layers generally parallel to the substrate, and a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectric layer form a capacitor, wherein a slot is formed in at least one of the first and second conductive layers proximate the magnetic field sensor for reducing eddy currents in the first and second conductive layers.

Claims

1. An integrated circuit, comprising:

a substrate having a magnetic field sensor;

first and second conductive layers generally parallel to the substrate; and

a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectric layer form a capacitor,

wherein a slot is formed in at least one of the first and second conductive layers proximate the magnetic field sensor for reducing eddy currents in the first and second conductive layers.

2. The integrated circuit according to claim 1, wherein the substrate includes circuitry, and the integrated circuit further includes at least one conductive layer to interconnect the circuitry and an insulator layer to electrically insulate the at least one conductive layer.

3. The integrated circuit according to claim 1, further including first and second terminals, wherein the first terminal is electrically connected to the first conductive layer and the second terminal is electrically connected to the second conductive layer.

4. The integrated circuit according to claim 1, wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots having different geometries.

5. The integrated circuit according to claim 1, wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots have substantially similar geometries

6. The integrated circuit according to claim 1, wherein the slot extends from a point proximate the magnetic field sensor to an edge of the capacitor.

7. The integrated circuit according to claim 1, wherein the magnetic field sensor includes a Hall element.

8. The integrated circuit according to claim 1, wherein the magnetic field sensor includes a magnetoresistance element.

9. The integrated circuit according to claim 1, wherein the capacitor overlaps with at least thirty percent of an area of the substrate.

10. The integrated circuit according to claim 1, wherein the capacitor provides a capacitance from about 100 pF to about 1,500 pF for a substrate ranging in size from about 1 mm² to about 10 mm².

11. The integrated circuit according to claim 3, wherein the first terminal is adapted for coupling to a voltage supply terminal.

12. The integrated circuit according to claim 11, wherein the second terminal is adapted for coupling to a ground terminal.

13. The integrated circuit according to claim 1, further including a second die in communication with the first die, the second die having third and fourth conductive layers and a second dielectric layer forming a second on-chip capacitor on the second die proximate a second magnetic field sensor, wherein the second capacitor includes a second capacitor slot including a slot in the third conductive layer to reduce eddy current flow.

14. The integrated circuit according to 13, wherein the second capacitor slot further includes a slot in the fourth conductive layer.

15. The integrated circuit according to claim 13, wherein the wherein the first and second substrates are of different materials.

16. A method, comprising:

forming a first conductive layer generally parallel to a substrate containing circuitry;

forming a dielectric layer for the first conductive layer;

forming a second conductive layer over the dielectric layer such that the first conductive layer, the dielectric layer, and the second conductive layer form a first capacitor;

forming a slot in the first conductive layer proximate a magnetic field element in the substrate; and

providing first and second terminals, wherein the first terminal is coupled to the first conductive layer and the second terminal is coupled to the second conductive layer.

17. The method according to claim 16, wherein the slot extends from a point proximate to the magnetic field sensor to an edge of the first capacitor.

18. The method according to claim 16, wherein the capacitor overlaps with at least thirty percent of an area of the substrate.

19. The method according to claim 16, wherein the magnetic field sensor includes a Hall sensor.

20. The method according to claim 16, wherein the magnetic field sensor includes a magnetoresistance element.

21. The method according to claim 16, further including forming a second capacitor on a second substrate in communication with the first substrate, and forming a second slot in the second capacitor to reduce eddy currents associated with a second magnetic field sensor.

22. A vehicle, comprising:

An integrated circuit, comprising;

a substrate having a magnetic field sensor;

first and second conductive layers generally parallel to the substrate; and

a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectric layer form a capacitor,

wherein a slot is formed in at least one of the first and second conductive layers proximate the magnetic field sensor for reducing eddy currents in the first and second conductive layers.

23. The vehicle according to claim 22, wherein the substrate includes circuitry, and the integrated circuit further includes at least one conductive interconnect layer to interconnect the circuitry and an insulator layer to electrically insulate the at least one conductive layer.

24. The vehicle according to claim 22, further including first and second terminals, wherein the first terminal is electrically connected to the first conductive layer and the second terminal is electrically connected to the second conductive layer.

25. The vehicle according to claim 22, wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots have different geometries.