Critical Area Deterministic Sampling

• US 20100023905A1
• Filed: 02/20/2009
• Published: 01/28/2010
• Est. Priority Date: 02/20/2008
• Status: Abandoned Application

• Current Assignee: Fedor G. Pikus, John W. Stedman
• Original Assignee: Fedor G. Pikus, John W. Stedman
• Inventors: Pikus, Fedor G., Stedman, John W.
• Application Number:
  US12/390,354
• Publication Number:
  US 20100023905A1
• Time in Patent Office: Days
• US Class Current: 716/124
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

A layout design for a portion of a microdevice design is partitioned into sections or “bins.” Next, a critical area value is estimated for one or more of the bins. One or more of these estimated bins is then selected for a more detailed analysis. After the estimated bins have been selected, a detailed critical area analysis of the selected bins is performed. Once the actual critical area for each of the estimated bins has been determined, the actual critical areas for selected estimated bins are correlated with those bin'"'"'s corresponding estimated values. By correlating the actual critical areas of selected estimated bin to those bin'"'"'s corresponding estimated values, a mapping function can be determined. After the mapping function has been determined, it is applied to the estimated values for each of the remaining bins of the layout design (i.e., the bins for which an actual critical area have not yet been determined) to obtain critical area information for the layout design. The layout design can then be modified based upon the obtained critical area information.

Claims

1. A method of determining a critical area of a layout design for a portion of a microdevice, comprising:

partitioning the layout design into bins;

estimating a critical area value for one or more of the bins;

performing a detailed critical area analysis for the estimated bins to determine an actual critical area value for each of the selected bins;

correlating the actual critical areas of estimated bins with their corresponding estimated values to determine a mapping function;

applying the mapping function to the estimated values of bins for which an actual critical area value has not been determined, to obtain critical area information for the layout design.

2. A method for modifying a layout design for a portion of a microdevice design, comprising:

partitioning the layout design into bins;

estimating a critical area value for one or more of the bins;

performing a detailed critical area analysis for the estimated bins to determine an actual critical area value for each of the selected bins;

correlating the actual critical areas of estimated bins with their corresponding estimated values to determine a mapping function;

applying the mapping function to the estimated values of bins for which an actual critical area value has not been determined, to obtain critical area information for the layout design; and

modifying the layout design based upon the determined critical area information.

3. A apparatus for determining a critical area of a layout design for a portion of a microdevice, comprising:

a design partition module that partitions a layout design into bins;

a critical area estimation module that estimates a critical area value for one or more of the bins;

a critical area analysis module that performs a detailed critical area analysis for the estimated bins to determine an actual critical area value for each of the selected bins;

a mapping function correlation module that correlates the actual critical areas of estimated bins with their corresponding estimated values to determine a mapping function; and

a critical area determination module that applies the mapping function to the estimated values of bins for which an actual critical area value has not been determined, to obtain critical area information for the layout design.