SEMICONDUCTOR LAYER MANUFACTURING METHOD, SEMICONDUCTOR LAYER MANUFACTURING APPARATUS, AND SEMICONDUCTOR DEVICE MANUFACTURED USING SUCH METHOD AND APPARATUS

• US 20100024872A1
• Filed: 12/05/2007
• Published: 02/04/2010
• Est. Priority Date: 12/27/2006
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Fukuoka, Yusuke, Kishimoto, Katsushi
• Granted Patent: US 8,389,389 B2
• Time in Patent Office: Days
• US Class Current: 136/255
• CPC Class Codes: C23C 16/4408 by purging residual gases from the reaction chamber or gas lines
• CPC Class Codes: C23C 16/45557 Pulsed pressure or control pressure
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02661 In-situ cleaning
• CPC Class Codes: H01L 31/0747 comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/1816 Special manufacturing methods for microcrystalline layers, e.g. uc-SiGe, uc-SiC
• CPC Class Codes: H01L 31/202 including only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Provided are a semiconductor layer manufacturing method and a semiconductor manufacturing apparatus capable of forming a high quality semiconductor layer even by a single chamber system, with a shortened process time required for reducing a concentration of impurities that exist in a reaction chamber before forming the semiconductor layer. A semiconductor device manufactured using such a method and apparatus is also provided. The present invention relates to a semiconductor layer manufacturing method of forming a semiconductor layer inside a reaction chamber (101) capable of being hermetically sealed, including an impurities removing step of removing impurities inside the reaction chamber (101) using a replacement gas, and a semiconductor layer forming step of forming the semiconductor layer, the impurities removing step being a step in which a cycle composed of a replacement gas introducing step of introducing the replacement gas into the reaction chamber (101) and an exhausting step of exhausting the replacement gas is repeated a plurality of times, the impurities removing step being performed at least before the semiconductor layer forming step.

Claims

1-15. -15. (canceled)

16. A semiconductor layer manufacturing method of forming a semiconductor layer inside a reaction chamber capable of being hermetically sealed, comprising:

an impurities removing step of removing impurities inside said reaction chamber using a replacement gas; and

a semiconductor layer forming step of forming said semiconductor layer,

said impurities removing step being a step in which a cycle composed of a replacement gas introducing step of introducing the replacement gas into said reaction chamber and an exhausting step of exhausting an inside of said reaction chamber is repeated a plurality of times,

said impurities removing step being performed at least before the semiconductor layer forming step.

17. The semiconductor layer manufacturing method according to claim 16, wherein said semiconductor layer includes a plurality of layers having different conductivity types, and said semiconductor layer is formed inside the same said reaction chamber.

18. The semiconductor layer manufacturing method according to claim 16, wherein,

in said replacement gas introducing step, exhaust from said reaction chamber is stopped, and when a pressure inside said reaction chamber is increased to greater than or equal to a pressure after introducing the replacement gas that has been set beforehand, introduction of said replacement gas is stopped and said replacement gas introducing step is terminated, and

in said exhausting step, introduction of said replacement gas is stopped, and when the pressure inside said reaction chamber is reduced to less than or equal to a pressure after exhaust that has been set beforehand, said exhaust is stopped and said exhausting step is terminated.

19. The semiconductor layer manufacturing method according to claim 16, wherein

in said replacement gas introducing step, said replacement gas is introduced into said reaction chamber to have a pressure greater than or equal to a pressure after introducing the replacement gas that has been set beforehand,

in said exhausting step, the inside of said reaction chamber is exhausted to have a pressure less than or equal to a pressure after exhaust that has been set beforehand,

and

a number n (unit:

number of times) of said cycle satisfies an expression;

[N]_o(M/m)ⁿ≦

[N],

where [N] (unit;

atoms/cm³) represents an allowable concentration of impurity atoms inside said reaction chamber immediately before said semiconductor layer forming step that has been set beforehand, [N]_o (unit;

atoms/cm³) represents a concentration of impurity atoms inside said reaction chamber before starting said cycle, m (unit;

Pa) represents said pressure after introducing the replacement gas, and M (unit;

Pa) represents said pressure after exhaust.

20. The semiconductor layer manufacturing method according to claim 17, wherein

in said replacement gas introducing step, said replacement gas is introduced into said reaction chamber to have a pressure greater than or equal to a pressure after introducing the replacement gas that has been set beforehand,

in said exhausting step, the inside of said reaction chamber is exhausted to have a pressure less than or equal to a pressure after exhaust that has been set beforehand,

and

a number n (unit:

number of times) of said cycle satisfies an expression;

[N]_o×

(M/m)ⁿ≦

[N],

where [N] (unit;

atoms/cm³) represents an allowable concentration of impurity atoms inside said reaction chamber immediately before said semiconductor layer forming step that has been set beforehand, [N]_o (unit;

atoms/cm³) represents a concentration of impurity atoms inside said reaction chamber before starting said cycle, m (unit;

Pa) represents said pressure after introducing the replacement gas, and M (unit;

Pa) represents said pressure after exhaust.

21. The semiconductor layer manufacturing method according to claim 16, wherein a background pressure inside said reaction chamber immediately before said semiconductor layer forming step is greater than or equal to 0.1 Pa and less than or equal to 10000 Pa.

22. The semiconductor layer manufacturing method according to claim 16, wherein

said semiconductor layer is a semiconductor layer used in a photoelectric conversion element, and includes a p-type layer, an i-type layer, and an n-type layer,

said semiconductor layer forming step includes:

a first conductive layer forming step of forming a first conductive layer made of a p-type layer or an n-type layer;

a photoelectric conversion layer forming step of forming a photoelectric conversion layer made of an i-type layer on said first conductive layer; and

a second conductive layer forming step of forming a second conductive layer made of a p-type layer or an n-type layer on said photoelectric conversion layer, and

said first conductive layer and said second conductive layer are formed to have conductivity types different from each other.

23. The semiconductor layer manufacturing method according to claim 22, further comprising a buffer layer forming step of forming a buffer layer made of an i-type layer between said first conductive layer forming step and said photoelectric conversion layer forming step.

24. The semiconductor layer manufacturing method according to claim 23, further comprising said impurities removing step between said first conductive layer forming step and said buffer layer forming step.

25. The semiconductor layer manufacturing method according to claim 23, further comprising said impurities removing step between said buffer layer forming step and said photoelectric conversion layer forming step.

26. The semiconductor layer manufacturing method according to claim 23, wherein said buffer layer includes a plurality of layers, and said impurities removing step is further performed after each buffer layer is formed in said buffer layer forming step.

27. The semiconductor layer manufacturing method according to claim 22, wherein said replacement gas is at least any of gases used to form an i-type layer.

28. The semiconductor layer manufacturing method according to claim 22, wherein said semiconductor layer is made of a stack body of a plurality of pin semiconductors.

29. A semiconductor layer manufacturing apparatus used for the semiconductor layer manufacturing method according to claim 16, comprising:

a reaction chamber capable of being hermetically sealed for forming a semiconductor layer therein;

a gas introducing portion for introducing a replacement gas into said reaction chamber; and

a gas exhausting portion for exhausting the replacement gas from said reaction chamber.

30. The semiconductor layer manufacturing apparatus according to claim 29, wherein said gas exhausting portion includes at least any of a rotary pump, a mechanical booster pump, and a sorption pump.

31. A semiconductor device, comprising:

a substrate; and

a semiconductor layer and an electrode formed on said substrate,

said semiconductor layer being manufactured using the semiconductor layer manufacturing method according to claim 16.