SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20100025676A1
• Filed: 07/29/2009
• Published: 02/04/2010
• Est. Priority Date: 07/31/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: MIYANAGA, Akiharu, AKIMOTO, Kengo, YAMAZAKI, Shunpei, MIYAIRI, Hidekazu, SHIRAISHI, Kojiro
• Granted Patent: US 9,666,719 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

Claims

1. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode;

a gate insulating film covering the gate electrode;

a semiconductor layer over the gate electrode with the gate insulating film therebetween;

a channel protective layer in a region overlapping with a channel formation region of the semiconductor layer;

a pair of buffer layers over the semiconductor layer; and

source and drain electrode layers over the pair of buffer layers,

wherein the semiconductor layer comprises an oxide semiconductor, and the pair of buffer layers comprise an oxide semiconductor comprising indium, gallium, and zinc,

wherein a carrier concentration of the pair of buffer layers is higher than that of the semiconductor layer, and

wherein the semiconductor layer is electrically connected to the source and drain electrode layers through the pair of buffer layers.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor comprises indium, gallium, and zinc.

3. The semiconductor device according to claim 1, wherein the pair of buffer layers include an impurity imparting n-type conductivity.

4. The semiconductor device according to claim 1, wherein the carrier concentration of the semiconductor layer is less than 1×

10¹⁷ atoms/cm³, and the carrier concentration of the pair of buffer layers is 1×

10¹⁸ atoms/cm³ or more.

5. The semiconductor device according to claim 1, further comprising a pair of second buffer layers provided between the semiconductor layer and the pair of buffer layers, wherein a carrier concentration of the pair of second buffer layers is higher than that of the semiconductor layer and lower than that of the pair of buffer layers.

6. The semiconductor device according to claim 1, wherein the source and drain electrode layers comprise titanium.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating film over the gate electrode layer;

forming a semiconductor layer over the gate insulating film;

forming a channel protective layer over the semiconductor layer and in a region overlapping with a channel formation region;

forming a pair of buffer layers having n-type conductivity over the semiconductor layer; and

forming source and drain electrode layers over the pair of buffer layers,

wherein the semiconductor layer comprises an oxide semiconductor, and the pair of buffer layers comprise an oxide semiconductor comprising indium, gallium, and zinc,

wherein a carrier concentration of the pair of buffer layers is higher than that of the semiconductor layer, and

wherein the semiconductor layer and the source and drain electrode layers are electrically connected to each other through the pair of buffer layers.

9. The method for manufacturing a semiconductor device according to claim 7, wherein the oxide semiconductor comprises indium, gallium, and zinc.

11. The method for manufacturing a semiconductor device, according to claim 7, wherein the gate insulating film, the semiconductor layer, and the channel protective layer are formed by a sputtering method.

13. The method for manufacturing a semiconductor device, according to claim 7, wherein the gate insulating film, the semiconductor layer, and the channel protective layer are formed in an oxygen atmosphere.

15. The method for manufacturing a semiconductor device, according to claim 7, wherein the pair of buffer layers are formed in a rare gas atmosphere.

17. The method for manufacturing a semiconductor device, according to claim 7, wherein the carrier concentration of the semiconductor layer is less than 1×

10¹⁷ atoms/cm³, and the carrier concentration of the pair of buffer layers is 1×

10¹⁸ atoms/cm³ or more.

19. The method for manufacturing a semiconductor device, according to claim 7, wherein the pair of buffer layers comprises magnesium, aluminum, or titanium.

8. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating film over the gate electrode layer;

forming a semiconductor layer over the gate insulating film;

forming a channel protective layer over the semiconductor layer and in a region overlapping with a channel formation region;

forming a pair of buffer layers having n-type conductivity over the semiconductor layer; and

forming source and drain electrode layers over the pair of buffer layers,

wherein the semiconductor layer comprises an oxide semiconductor, and the pair of buffer layers comprise an oxide semiconductor comprising indium, gallium, and zinc,

wherein a carrier concentration of the pair of buffer layers is higher than that of the semiconductor layer,

wherein the semiconductor layer and the source and drain electrode layers are electrically connected to each other through the pair of buffer layers,

wherein the gate insulating film, the semiconductor layer, and the channel protective layer are successively formed without being exposed to the air.

10. The method for manufacturing a semiconductor device according to claim 8, wherein the oxide semiconductor comprises indium, gallium, and zinc.

12. The method for manufacturing a semiconductor device, according to claim 8, wherein the gate insulating film, the semiconductor layer, and the channel protective layer are formed by a sputtering method.

14. The method for manufacturing a semiconductor device, according to claim 8, wherein the gate insulating film, the semiconductor layer, and the channel protective layer are formed in an oxygen atmosphere.

16. The method for manufacturing a semiconductor device, according to claim 8, wherein the pair of buffer layers are formed in a rare gas atmosphere.

18. The method for manufacturing a semiconductor device, according to claim 8, wherein the carrier concentration of the semiconductor layer is less than 1×

10¹⁷ atoms/cm³, and the carrier concentration of the pair of buffer layers is 1×

10¹⁸ atoms/cm³ or more.

20. The method for manufacturing a semiconductor device, according to claim 8, wherein the pair of buffer layers comprises magnesium, aluminum, or titanium.