SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20100025677A1
• Filed: 07/29/2009
• Published: 02/04/2010
• Est. Priority Date: 07/31/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIMOTO, Kengo, YAMAZAKI, Shunpei, MIYAIRI, Hidekazu, SHIRAISHI, Kojiro
• Granted Patent: US 8,945,981 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.

Claims

1. A semiconductor device comprising:

a gate electrode;

a gate insulating film over the gate electrode;

an oxide semiconductor layer over the gate insulating film;

a channel protective layer over the oxide semiconductor layer, wherein the channel protective layer overlaps a channel formation region of the oxide semiconductor layer;

a first buffer layer and a second buffer layer over the oxide semiconductor layer; and

a source electrode over the first buffer layer, and a drain electrode over the second buffer layer,

wherein the first buffer layer and the second buffer layer include titanium oxide, and wherein a portion of the first buffer layer and a portion of the second buffer layer are in contact with an upper surface of the channel protective layer.

2. The semiconductor device according to claim 1, wherein the first buffer layer and the second buffer layer have a carrier concentration higher than the oxide semiconductor layer.

3. The semiconductor device according to claim 1, wherein the first buffer layer and the second buffer layer include an impurity imparting n-type conductivity.

4. The semiconductor device according to claim 1, wherein the first buffer layer and the second buffer layer include indium, gallium, or zinc.

5. The semiconductor device according to claim 1, further comprising a third buffer layer having a carrier concentration higher than the oxide semiconductor layer and lower than the first buffer layer between the oxide semiconductor layer and the first buffer layer, and

a fourth buffer layer having a carrier concentration higher than the oxide semiconductor layer and lower than the second buffer layer between the oxide semiconductor layer and the second buffer layer.

6. The semiconductor device according to claim 1, wherein the source electrode and the drain electrode include titanium.

7. The semiconductor device according to claim 1, further comprising a insulating layer including a organic resin over the source electrode and the drain electrode.

8. The semiconductor device according to claim 1, wherein the oxide semiconductor layer includes indium, gallium, and zinc.

9. A manufacturing method of a semiconductor device, comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating film over the gate electrode;

forming a oxide semiconductor layer over the gate insulating film;

forming a channel protective layer over the oxide semiconductor layer, wherein the channel protective layer overlaps a channel formation region of the oxide semiconductor layer;

forming a buffer layer including titanium oxide over the oxide semiconductor layer;

forming a first buffer layer and a second buffer layer by etching the buffer layer, and

forming a source electrode over the first buffer layer; and

forming a drain electrode over the second buffer layer,

wherein the first buffer layer and the second buffer layer have a carrier concentration higher than the oxide semiconductor layer, and

wherein the oxide semiconductor layer and the source electrode are electrically connected to each other through the first buffer layer, and the oxide semiconductor layer and the drain electrode are electrically connected to each other through the second buffer layer.

11. The manufacturing method of a semiconductor device according to claim 9, wherein the gate insulating film, the oxide semiconductor layer, and the channel protective layer are formed by a sputtering method.

12. The manufacturing method of a semiconductor device according to claim 9, wherein the gate insulating film, the oxide semiconductor layer, and the channel protective layer are formed in an oxygen atmosphere.

13. The manufacturing method of a semiconductor device according to claim 9, wherein the buffer layer is formed in a rare gas atmosphere.

14. The manufacturing method of a semiconductor device according to claim 9, further comprising the steps of heating the oxide semiconductor layer.

15. The manufacturing method of a semiconductor device according to claim 9, wherein the oxide semiconductor layer includes indium, gallium, and zinc.

16. The manufacturing method of a semiconductor device according to claim 9, wherein a portion of the first buffer layer and a portion of the second buffer layer are in contact with an upper surface of the channel protective layer.

10. A manufacturing method of a semiconductor device, comprising the steps of:

forming a gate electrode;

forming a gate insulating film over the gate electrode;

forming a oxide semiconductor layer over the gate insulating film;

forming a channel protective layer over the oxide semiconductor layer, wherein the channel protective layer overlaps a channel formation region of the oxide semiconductor layer;

forming a buffer layer including titanium oxide over the oxide semiconductor layer;

forming a first buffer layer and a second buffer layer by etching the buffer layer, and

forming a source electrode over the first buffer layer; and

forming a drain electrode over the second buffer layer,

wherein the first buffer layer and the second buffer layer have a carrier concentration higher than the oxide semiconductor layer,

wherein the oxide semiconductor layer and the source electrode are electrically connected to each other through the first buffer layer, and the oxide semiconductor layer and the drain electrode are electrically connected to each other through the second buffer layer, and

wherein the gate insulating film, the oxide semiconductor layer, and the channel protective layer are formed without being exposed to air.

17. The manufacturing method of a semiconductor device according to claim 10, wherein the gate insulating film, the oxide semiconductor layer, and the channel protective layer are formed by a sputtering method.

18. The manufacturing method of a semiconductor device according to claim 10, wherein the gate insulating film, the oxide semiconductor layer, and the channel protective layer are formed in an oxygen atmosphere.

19. The manufacturing method of a semiconductor device according to claim 10, wherein the buffer layer is formed in a rare gas atmosphere.

20. The manufacturing method of a semiconductor device according to claim 10, further comprising the steps of heating the oxide semiconductor layer.

21. The manufacturing method of a semiconductor device according to claim 10, wherein the oxide semiconductor layer includes indium, gallium, and zinc.

22. The manufacturing method of a semiconductor device according to claim 10, wherein a portion of the first buffer layer and a portion of the second buffer layer are in contact with an upper surface of the channel protective layer.