SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100025678A1
• Filed: 07/29/2009
• Published: 02/04/2010
• Est. Priority Date: 07/31/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIMOTO, Kengo, YAMAZAKI, Shunpei, MIYAIRI, Hidekazu, SHIRAISHI, Kojiro
• Granted Patent: US 8,129,717 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/46 Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 manufacture of electrodes thereon H01L21/44
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Claims

1. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a semiconductor layer over the gate insulating layer;

a first buffer layer over the semiconductor layer;

a second buffer layer over the semiconductor layer;

a source electrode layer over the first buffer layer; and

a drain electrode layer over the second buffer layer,

wherein the semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc, and

wherein each of the first buffer layer and the second buffer layer comprises metal oxide.

2. The semiconductor device according to claim 1, wherein each of the first buffer layer and the second buffer layer has n-type conductivity.

3. The semiconductor device according to claim 1, wherein each of the first buffer layer and the second buffer layer contains an impurity element imparting n-type conductivity.

4. The semiconductor device according to claim 1, further comprising a third buffer layer between the semiconductor layer and the first buffer layer, wherein a carrier concentration of the third buffer layer is higher than that of the semiconductor layer and lower than that of the first buffer layer.

5. The semiconductor device according to claim 4, wherein the third buffer layer comprises a mixed layer of an oxide semiconductor layer containing indium, gallium, and zinc and a metal oxide layer.

6. The semiconductor device according to claim 1, wherein the source electrode layer and the drain electrode layer each contain titanium.

7. The semiconductor device according to claim 1, further comprising an insulating film over the thin film transistor,

wherein the insulating film is in contact with the source electrode layer, the drain electrode layer, and the semiconductor layer between the source electrode layer and the drain electrode layer.

8. The semiconductor device according to claim 1, wherein an end portion of the first buffer layer is outside an end portion of the source electrode layer, and

wherein an end portion of the second buffer layer is outside an end portion of the drain electrode layer.

9. The semiconductor device according to claim 1, wherein a part of the source electrode layer and a part of the drain electrode layer are in contact with the gate insulating layer.

10. The semiconductor device according to claim 1, wherein each of the first buffer layer and the second buffer layer has a tapered side surface.

11. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a semiconductor layer over the gate insulating layer;

a first buffer layer over the semiconductor layer;

a second buffer layer over the semiconductor layer;

a source electrode layer over the first buffer layer; and

a drain electrode layer over the second buffer layer,

wherein the semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc;

wherein a region of the semiconductor layer between the first buffer layer and the second buffer layer is thinner than a region of the semiconductor layer under the first buffer layer and a region of the semiconductor layer under the second buffer layer, and

wherein each of the first buffer layer and the second buffer layer comprises metal oxide.

12. The semiconductor device according to claim 11, wherein each of the first buffer layer and the second buffer layer has n-type conductivity.

13. The semiconductor device according to claim 11, wherein each of the first buffer layer and the second buffer layer contains an impurity element imparting n-type conductivity.

14. The semiconductor device according to claim 11, further comprising a third buffer layer between the semiconductor layer and the first buffer layer,

wherein a carrier concentration of the third buffer layer is higher than that of the semiconductor layer and lower than that of the first buffer layer.

15. The semiconductor device according to claim 14, wherein the third buffer layer comprises a mixed layer of an oxide semiconductor layer containing indium, gallium, and zinc and a metal oxide layer.

16. The semiconductor device according to claim 11, wherein the source electrode layer and the drain electrode layer each contain titanium.

17. The semiconductor device according to claim 11, further comprising an insulating film over the thin film transistor,

wherein the insulating film is in contact with the source electrode layer, the drain electrode layer, and the semiconductor layer between the source electrode layer and the drain electrode layer.

18. The semiconductor device according to claim 11, wherein an end portion of the first buffer layer is outside an end portion of the source electrode layer, and

wherein an end portion of the second buffer layer is outside an end portion of the drain electrode layer.

19. The semiconductor device according to claim 11, wherein a part of the source electrode layer and a part of the drain electrode layer are in contact with the gate insulating layer.

20. The semiconductor device according to claim 11, wherein each of the first buffer layer and the second buffer layer has a tapered side surface.

21. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a semiconductor layer over the gate insulating layer;

forming a metal oxide film over the semiconductor layer;

forming a conductive film over the metal oxide film;

forming a source electrode layer and a drain electrode layer by etching the conductive film; and

forming a first buffer layer and a second buffer layer over the semiconductor layer by etching the metal oxide film,

wherein the semiconductor layer comprises oxide semiconductor containing indium, gallium, and zinc.

22. The method for manufacturing a semiconductor device according to claim 21, wherein the gate insulating layer, the semiconductor layer, the metal oxide film, and the conductive film are formed by a sputtering method.

23. The method for manufacturing a semiconductor device according to claim 22, wherein the gate insulating layer and the semiconductor layer are formed under an oxygen atmosphere.

24. The method for manufacturing a semiconductor device according to claim 22, wherein the metal oxide film is formed under a nitrogen atmosphere or a rare gas atmosphere.

25. The method for manufacturing a semiconductor device according to claim 21, wherein the metal oxide film is formed so as to contain magnesium, aluminum, or titanium.

26. The method for manufacturing a semiconductor device according to claim 21, wherein the source electrode layer and the drain electrode layer each contain titanium.

27. The method for manufacturing a semiconductor device, according to claim 21, wherein the semiconductor layer is formed by etching a semiconductor film.

28. The method for manufacturing a semiconductor device according to claim 27, wherein the metal oxide film and the conductive film are etched when the semiconductor film is etched.

29. The method for manufacturing a semiconductor device according to claim 21,

wherein the source electrode layer and the drain electrode layer are formed by etching the conductive film with a mask, and

wherein the first buffer layer and the second buffer layer are formed by etching the metal oxide film with the mask.

30. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a semiconductor layer over the gate insulating layer;

forming a metal oxide film over the semiconductor layer;

forming a conductive film over the metal oxide film;

forming a source electrode layer and a drain electrode layer by etching the conductive film; and

forming a first buffer layer and a second buffer layer over the semiconductor layer by etching the metal oxide film,

wherein the semiconductor layer comprises oxide semiconductor containing indium, gallium, and zinc, and

wherein the gate insulating layer, the semiconductor layer, the metal oxide film, and the conductive film are formed successively without being exposed to air.

31. The method for manufacturing a semiconductor device according to claim 30, wherein the gate insulating layer, the semiconductor layer, the metal oxide film, and the conductive film are formed by a sputtering method.

32. The method for manufacturing a semiconductor device according to claim 31, wherein the gate insulating layer and the semiconductor layer are formed under an oxygen atmosphere.

33. The method for manufacturing a semiconductor device according to claim 31, wherein the metal oxide film is formed under a nitrogen atmosphere or a rare gas atmosphere.

34. The method for manufacturing a semiconductor device according to claim 30, wherein the metal oxide film is formed so as to contain magnesium, aluminum, or titanium.

35. The method for manufacturing a semiconductor device according to claim 30, wherein the source electrode layer and the drain electrode layer each contain titanium.

36. The method for manufacturing a semiconductor device according to claim 30, wherein the semiconductor layer is formed by etching a semiconductor film.

37. The method for manufacturing a semiconductor device according to claim 36, wherein the metal oxide film and the conductive film are etched when the semiconductor film is etched.

38. The method for manufacturing a semiconductor device according to claim 30,

wherein the source electrode layer and the drain electrode layer are formed by etching the conductive film with a mask, and

wherein the first buffer layer and the second buffer layer are formed by etching the metal oxide film with the mask.