JITTER BUFFER CONTROL METHOD AND COMMUNICATION APPARATUS

• US 20100027567A1
• Filed: 07/27/2009
• Published: 02/04/2010
• Est. Priority Date: 07/30/2008
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: TERAMOTO, SHUJI
• Granted Patent: US 8,149,884 B2
• Time in Patent Office: Days
• US Class Current: 370/516
• CPC Class Codes: H04J 3/0632 Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES] queuing arrangements in packet switching elements H04L49/90; synchronising systems for the synchronous transmission of a pulse code modulated video signal with one or more other pulse code modulated signals H04N7/56
• CPC Class Codes: H04J 3/0664 unidirectional timestamps
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/28 in relation to timing considerations
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/9023 for implementing a jitter-buffer

Abstract

Disclosed is an apparatus comprising a jitter buffer that writes and reads packets transmitted via a packet network from a transmission node, a clock correction unit that obtains an inter-packet jitter, based on difference information between time stamp information at the time of reception of the packet on a receiving side and time stamp information attached to the packet at the time of transmission of the packet by a transmission node with regards to packets received before and after and obtains a transmission frequency and a PLL unit that receives frequency information from the clock correction unit and generates a clock of the frequency. A scheduler uses a frequency from the PLL unit as a transmission frequency to transmit a packet from the jitter buffer unit.

Claims

1. A communication apparatus that receives, via a packet network, a packet transmitted by a transmission side, the apparatus comprising:

a jitter buffer in which after the packet received is written, the packet being is read; and

a control unit that obtains an inter-packet jitter based on difference information between time stamp information at the time of reception of the packet and another time stamp information attached to the packet at the time of transmission of the packet by the transmission side, with regard to at least one of a plurality of the received packets, and that performs control to change a reference frequency in accordance with the inter-packet jitter to transmit the packet from the jitter buffer based on a changed transmission frequency.

2. The communication apparatus according to claim 1, wherein the control unit obtains the inter-packet jitter, based on the difference of the difference information related to two packets received temporarily before and after.

3. The communication apparatus according to claim 1, wherein the control unit takes, as the transmission frequency, a frequency obtained by multiplying, by the reference frequency, a value obtained by dividing a transmission interval of packets read from the jitter buffer, by a value obtained by adding the inter-packet jitter to the transmission interval of the packets.

4. The communication apparatus according to claim 1, wherein the control unit comprises:

a clock correction unit; and

a clock generation circuit that changes a clock frequency, wherein

the clock correction unit obtains the inter-packet jitter, based on a difference of;

difference information, with regard to one packet received, between time stamp information at the time of reception of the one packet and time stamp information attached to the one packet at the time of transmission of the one packet by the transmitting side; and

difference information, with regard to a packet received before the one packet, between time stamp information at the time of reception of the packet and time stamp information attached to the packet at the time of transmission of the packet by the transmitting side,

the clock correction unit takes as the transmission frequency, a frequency obtained by multiplying, by the reference frequency, a value obtained by dividing the transmission interval of the packets by a value obtained by adding the inter-packet jitter to the transmission interval of packets read from the jitter buffer,

the clock generation circuit receives transmission frequency information from the clock correction unit, generates a clock of the frequency, and

the packet is transmitted from the jitter buffer using frequency from the clock generation circuit.

5. The communication apparatus according to claim 1, wherein the number of packets accumulated in the jitter buffer are monitored for a prescribed time,

in case the minimum number of accumulated packets between a write pointer indicating a position of writing to the jitter buffer and a read pointer indicating a position of reading from the jitter buffer is greater than or equal to one, it is decided that the position of the write pointer is not a position of the shortest delay, and a correction of the write pointer is performed in a direction that reduces the accumulation of packets so that delay time is a minimum, and

in case the minimum number of accumulated packets is less than one, it is decided that the position of the write pointer is appropriate, and correction of the write pointer is not performed, and wherein

when it is decided that correction processing of the write pointer is necessary, the minimum number of accumulated packets and the maximum number of accumulated packets in a prescribed time are measured, a measurement of jitter range is performed, and a correction is performed on the write pointer, so that delay in the jitter buffer is a minimum.

6. The communication apparatus according to claim 5, wherein

in case, after correction of the write pointer, jitter due to the packet network has become large, control is performed to correct the write pointer in a direction in which it is possible to absorb the jitter, in order to absorb the jitter that has become large, wherein control is performed to keep the delay small by repeating write pointer correction, in prescribed time units, until there is no longer an underrun.

7. The communication apparatus according to claim 1, further comprising:

a scheduler unit that schedules transmission of a packet from the jitter buffer; and

a packet branching unit that gives a packet received from the packet network to the jitter buffer and gives time stamp information and sequence number of the packet to the scheduler unit, wherein

in the jitter buffer, packets are accumulated in input order from the packet branching unit, and held for a time period specified by a read pointer and a write pointer, and

the scheduler unit records time stamp information and a sequence number in sequence, and notifies a storage position within the jitter buffer of the subsequently transmitted packet to the jitter buffer.

8. The communication apparatus according to claim 7, wherein the scheduler unit, in case a sequence number of a subsequent packet, with N as an address of the previous packet, is stored in an address M, obtains a value M-N, corresponding to the subsequent packet position of a jitter buffer, and transmits the value M-N to the jitter buffer, and

the jitter buffer receives a value M-N, corresponding to the subsequent packet position of the jitter buffer transmitted by the scheduler unit, and transmits the packet using the frequency.

9. The communication apparatus according to claim 1, wherein the packet is transmitted via a TDM (Time Division Multiplex) interface to a PBX (Private Branch eXchange).

10. A system comprising:

the communication apparatus according to claim 1; and

a communication apparatus that attaches a time stamp to a header of a packet to be transmitted to the packet network.

11. A method of controlling a jitter buffer in which a packet received via a packet network from a transmission side is written and read, the method comprising;

detecting a change of jitter of a received packet; and

controlling the jitter buffer so that, with regard to increase of the jitter, delay in the jitter buffer decreases.

12. The method according to claim 11, comprising:

receiving, via the packet network, a packet transmitted by the transmission side and writing the received packet temporarily into a jitter buffer;

obtaining a inter-packet jitter, with regard to each of a plurality of received packets, based on difference information of time stamp information at the time of reception of the packet, and time stamp information attached to the packet at the time of transmission of the packet by the transmitting side;

performing control to change a reference frequency according to the inter-packet jitter; and

performing transmission of the packets from the jitter buffer, based on changed transmission frequency.

13. The method according to claim 12, comprising

obtaining the inter-packet jitter, based on a difference of the difference information related to two packets received temporarily before and after.

14. The method according to claim 12, wherein a frequency obtained by multiplying, by the reference frequency, a value obtained by dividing a transmission interval of packets read from the jitter buffer, by a value obtained by adding the inter-packet jitter to the transmission interval of the packets, is taken as the transmission frequency.

15. The method according to claim 11, comprising

providing time stamp information and sequence number of the packets to a scheduler that schedules transmission of a packet from a jitter buffer;

the jitter buffer accumulating packets are accumulated in input order, and holding for a time period defined by a read pointer and a write pointer; and

the scheduler recording a received time stamp and a sequence number in sequence, and notifying a storage position in the jitter buffer of the subsequently transmitted packet to the jitter buffer.

16. The method according to claim 15, comprising:

monitoring the number of packets accumulated in the jitter buffer, for a prescribed time period;

deciding that the position of the write pointer is not a position of the shortest delay, and performing a correction of the write pointer in a direction that reduces the accumulation of packets so that delay time is a minimum, in case the minimum number of accumulated packets between a write pointer indicating a position of writing to the jitter buffer and a read pointer indicating a position of reading from the jitter buffer is greater than or equal to one; and

deciding that the position of the write pointer is appropriate, and performing no correction of the write pointer, in case the minimum number of accumulated packets is less than one, and wherein

when it is decided that correction processing of the write pointer is necessary, the minimum number of accumulated packets and the maximum number of accumulated packets in a prescribed time are measured, a measurement of jitter range is performed, and a correction is performed on the write pointer, so that delay in the jitter buffer is a minimum.

17. The method according to claim 15, comprising,

in case, after correction of the write pointer, jitter due to the packet network has become large,

performing control to correct the write pointer in a direction in which it is possible to absorb the jitter, in order to absorb the jitter that has become large, wherein control is performed to keep the delay small by repeating write pointer correction, in prescribed time units, until there is no longer an underrun.

18. The method according to claim 15, comprising

the scheduler, in case a sequence number of a subsequent packet, with N as an address of the previous packet, is stored in an address M, obtaining a value M-N, corresponding to the subsequent packet position of a jitter buffer, and transmitting the value M-N to the jitter buffer, and

the jitter buffer receiving a value M-N, corresponding to the subsequent packet position of the jitter buffer transmitted by the scheduler, and transmitting the packet using the frequency.

19. A computer readable recording medium storing a program that causes a computer comprising a communication apparatus that receives, via a packet network, a packet transmitted from a transmitting side, to execute the processing comprising:

obtaining an inter-packet jitter based on difference information between time stamp information at the time of reception of the packet and another time stamp information attached to the packet at the time of transmission of the packet by the transmission side, with regard to each of a plurality of received packets; and

performing control to change a reference frequency in accordance with the inter-packet jitter to transmit the packet from the jitter buffer based on a changed transmission frequency.

20. The medium according to claim 19, storing the program causing the computer to execute the processing of:

taking, as the transmission frequency, a frequency obtained by multiplying, by the reference frequency, a value obtained by dividing a transmission interval of packets read from the jitter buffer by a value obtained by adding the inter-packet jitter to the transmission interval of the packets.