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Level shifter with output spike reduction

  • US 20100033226A1
  • Filed: 07/17/2009
  • Published: 02/11/2010
  • Est. Priority Date: 07/18/2008
  • Status: Active Grant
First Claim
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1. A level shifter apparatus having at least one level-shifted final output ranging from about a positive supply voltage VDD in one state to about a negative supply voltage VSS in another state, either of the two states selectable under control of an input control signal operating within a range substantially different from the range VSS to VDD, the level shifter comprising:

  • a) a high-level source drive circuit and a low-level source drive circuit configured to output a high-level supply and a low-level supply, respectively, to a final output driver that produces therefrom a level-shifted final output, wherein during each static condition of either of the two states one of the two source drive circuit outputs is “

    at a rail”

    of either about VSS or about VDD and the other of the two source drive circuit outputs is “

    at common”

    at about common voltage; and

    b) “

    away from common”

    transition delay circuitry configured to delay a transition of a source drive output from “

    at common”

    toward a rail until after a different delay-control source drive output has significantly transitioned from “

    at a rail”

    toward common.

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