HARDWARE INITIATED THROUGHPUT (HITM) MEASUREMENT INSIDE AN OCP SYSTEM USING OCP SIDE BAND SIGNALS

• US 20100034248A1
• Filed: 08/08/2008
• Published: 02/11/2010
• Est. Priority Date: 08/08/2008
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Gadgil, Salil Shirish
• Granted Patent: US 7,886,096 B2
• Time in Patent Office: Days
• US Class Current: 375/225
• CPC Class Codes: H04L 43/0829 Packet loss
• CPC Class Codes: H04L 43/0888 Throughput

Abstract

A method, system, and apparatus to hardware initiated throughput (HITM) measurement inside an OCP system using OCP side band signals are disclosed. In one embodiment, a system of an integrated circuit includes a signal line located in the integrated circuit to communicate an electrical signal, a receiver circuit located in the integrated circuit coupled to the signal line, a transmitter module located in the integrated circuit to communicate a data stream to the receiver circuit through the signal line, and a throughput monitor circuit coupled to the signal line to measure a throughput value during a communication period of the data stream from the transmitter module. The system may include a processor module located in the integrated circuit configured to interrupt an operation of the transmitter module and a receiver module if the throughput monitor circuit generates the interrupt signal.

Claims

1. A system of an integrated circuit comprising:

a signal line located in the integrated circuit to communicate an electrical signal;

a receiver circuit located in the integrated circuit coupled to the signal line;

a transmitter module located in the integrated circuit to communicate a data stream to the receiver circuit through the signal line; and

a throughput monitor circuit coupled to the signal line to measure a throughput value during a communication period of the data stream from the transmitter module.

2. The system of claim 1:

wherein the transmitter module generates a start of availability signal at an initiation of the communication period from the transmitter module; and

wherein the transmitter module generates an end of availability signal at a termination of the communication period from the transmitter module.

3. The system of claim 2

wherein the communication period is initiated with a generation of the start of availability signal and terminated with an other generation of the end of availability signal.

4. The system of claim 3 wherein at least one of the start of availability and the end of availability signals is an OCP side band signal.

5. The system of claim 3:

wherein the throughput monitor circuit compares the throughput value with a specified throughput value; and

wherein the throughput monitor circuit generates an interrupt signal if the throughput value is less than the specified throughput value.

6. The system of claim 5 further comprising a processor module located in the integrated circuit configured to interrupt an operation of at least one of the transmitter module and a receiver module if the throughput monitor circuit generates the interrupt signal.

7. The system of claim 6 further comprising a total number of transfer counter circuit of the throughput monitor circuit to determine a total number of communicated data bits during a period between the start of availability signal and the end of availability signal.

8. The system of claim 7 further comprising a total time counter circuit of the throughput monitor circuit to measure the communication period between the start of availability signal and the end of availability signal.

9. The system of claim 8 wherein the throughput monitor circuit determines the throughput value as the total number of communicated data bits per the communication period.

10. The system of claim 9 wherein the transmitter module is a first in first out (FIFO) module.

11. The system of claim 10:

further comprising a plurality of FIFO modules and a plurality of throughput monitor modules;

wherein the plurality of FIFO modules are coupled in series with the receiver module; and

wherein certain ones of a plurality of throughput monitors are coupled between of certain ones of the plurality of FIFO modules.

12. The system of claim 9 further comprising an other throughput monitor circuit coupled to the signal line to continuously measure a continuous throughput value of the transmitter module.

13. A method of an integrated circuit:

coupling a transmitter module of the integrated circuit to an other module of the integrated circuit with a signal line;

configuring the transmitter module to communicate a data stream to the other module;

communicating the data stream from the transmitter module to the other module through the signal line; and

measuring a throughput value of the signal line between the transmitter module and the other module as a number of data bits per a specified time period during a communication of the data stream from the transmitter module to the other module.

14. The method of claim 13:

further comprising configuring the transmitter module to generate a start of availability signal when the transmitter module changes from not communicating the data stream to communicating the data stream,

further comprising configuring the transmitter module to generate an end of availability signal when the transmitter module changes from communicating the data stream to not communicating the data stream,

further comprising initiating a measurement of the throughput value with the start of availability signal; and

further comprising terminating the measurement of the throughput value with the end of availability signal.

15. The method of claim 14:

wherein the start of availability signal is an open core protocol (OCP) signal and the measurement of the throughput value initiates when the start of availability signal switches from a logic low state to a logic high state;

and wherein the end of availability is an other OCP signal and the measurement of the throughput value terminates when the end of availability signal switches from an other logic high to an other logic low state.

16. The method of claim 15:

further comprising a plurality of transmitter modules coupled in series; and

further comprising sequentially measuring the throughput value after each transmitter module of the plurality of transmitter modules beginning with the transmitter module of the plurality of transmitter modules located nearest to the other module and sequentially continuing in a direction opposite to the direction of the communication of the data stream.

17. An apparatus for measuring a throughput of data in an integrated circuit comprising:

a coupling circuit to couple the apparatus to a hub of an integrated device;

a time consumed circuit to measure a time period between a start of availability signal and an end of availability signal of an open core protocol (OCP) as measured at the hub;

a clock register circuit to determine a clock period that is a constant value;

a number of transfers circuit to measure a number of transfers as measured at the hub; and

a data width register circuit to determine a data width that is an other constant value.

18. The apparatus of claim 17:

further including a throughput computing circuit to determine a product of the time period and the clock period and an other product of the number of transfers and the data width;

wherein the data width is measured as a data per transfer;

wherein the number of transfers circuit is a counter-type circuit; and

wherein the time consumed circuit is the counter-type circuit.

19. The apparatus of claim 18 wherein a computing circuit computes a throughput value as a quotient of the product and the other product.

20. The apparatus of claim 19 wherein the time consumed circuit initiated a measurement of the time period when the start of availability signal switches from a logic low state to a logic high state and terminates the measurement of the time period when an end of availability signal switches from an other logic high state to an other logic low state.