NON-VOLATILE MEMORY AND CONTROLLING METHOD THEREOF

• US 20100037006A1
• Filed: 07/24/2009
• Published: 02/11/2010
• Est. Priority Date: 08/05/2008
• Status: Active Grant

• Current Assignee: ADATA Technology Co., Ltd.
• Original Assignee: ADATA Technology Co., Ltd.
• Inventors: Lin, Chuan-Sheng, Chen, Ming-Dar, Hsieh, Hsiang-An
• Granted Patent: US 8,205,036 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically

Abstract

A non-volatile memory of present invention includes a number of memory blocks and a static wear leveling device. The static wear leveling device includes a memory unit for storing the erase counts of the memory blocks and a controlling unit for getting the erase counts from the memory unit, and calculating the standard deviation based on the EC, and deciding the way of the static wear leveling cycle according to the standard deviation. The controlling unit deciding the way of the static wear leveling cycle include the steps of setting at least one predetermined threshold point and judging whether the standard deviation of the erase counts is smaller than the predetermined threshold point. If the standard deviation of the erase counts is smaller than the predetermined threshold point, the static wear leveling cycle starts for a first amount of cycles and moves the static data stored a first number of memory blocks. If the standard deviation of the erase counts is bigger than the predetermined threshold point, starts for a second amount of cycles and moves the static data stored a second number of memory blocks.

Claims

1. A method of controlling a non-volatile memory comprising a plurality of memory blocks, the method comprising:

calculating an erase count of each of the memory blocks; and

calculating the standard deviation of the erase counts to decide a way of a static wear leveling cycle.

2. The method of claim 1, wherein the way of a static wear leveling cycle comprises:

setting at least one predetermined; and

judging whether the standard deviation of the erase counts is bigger than the predetermined threshold point,

wherein, if the standard deviation of the erase counts is bigger than the predetermined threshold point, the static wear leveling cycle starts, and

wherein, if the standard deviation of the erase counts is not bigger than the predetermined threshold point, the static wear leveling cycle does not start.

3. The method of claim 2, wherein the static data comprises the data adapted to be rewritten very few or never rewritten, for instance the procedure code of the operating system.

4. The method of claim 2, wherein the static wear leveling cycle moves the static data stored in a memory block to another memory block having the highest EC, and erases the memory block.

5. A non-volatile memory comprising:

a plurality of memory blocks; and

a static wear leveling device including;

a memory unit configured to store erase counts of the memory blocks; and

a controlling unit configured to obtain the erase counts from the memory unit, to calculate the standard deviation based on the erase counts, and to decide a way of the static wear leveling cycle based at least partly on the standard deviation.

6. The non-volatile memory of claim 5, wherein the controlling unit is configured to decide the way of the static wear leveling cycle, the way comprising:

setting at least one predetermined threshold point; and

judging whether the standard deviation of the erase counts is smaller than the predetermined threshold point,

wherein, if the standard deviation of the erase counts is smaller than the predetermined threshold point, the static wear leveling cycle starts for a first amount of cycles and moves the static data stored a first number of memory blocks,

wherein, if the standard deviation of the erase counts is bigger than the predetermined threshold point, starts for a second amount of cycles and moves the static data stored a second number of memory blocks.

7. The non-volatile memory of claim 6, wherein the first number is zero.

8. The non-volatile memory of claim 6, wherein the first amount is bigger than the second amount and the first number is smaller than the second number.

9. A non-volatile memory comprising:

a plurality of memory blocks; and

a static wear leveling device including;

a memory unit, which stores the latest erasing time (ET) of the memory blocks; and

a controlling unit, which gets the latest ET from the memory unit, and finding out a memory block having the earliest ET, and starting the static wear leveling action for the memory block having the earliest ET.

10. The non-volatile memory of claim 9, wherein the memory unit stores the overall erase count of the memory blocks and the latest erase count of each of the memory blocks is corresponding to the overall EC.

11. The non-volatile memory of claim 9, wherein the static wear leveling action moves the static data stored in a memory block to another memory block having the highest EC, and erases the memory block.

12. The non-volatile memory of claim 9, wherein the memory unit stores the actual erase count of each of the memory blocks, and the controlling unit finds out a memory block having the smallest erase count before starting the static wear leveling action for the memory block.