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MULTICORE PROCESSOR AND METHOD OF CONTROLLING MULTICORE PROCESSOR

  • US 20100042870A1
  • Filed: 08/06/2009
  • Published: 02/18/2010
  • Est. Priority Date: 08/12/2008
  • Status: Abandoned Application
First Claim
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1. A multicore processor comprising:

  • a plurality of processor cores each of which is configured to execute a computation based on a program;

    a plurality of reconfigurable devices each reconfigurable dynamically in circuit configuration on the basis of circuit information;

    a lock state storage section configured to store lock information indicating whether or not each of the reconfigurable devices is locked by one of the plurality of processor cores; and

    a plurality of reconfigurable control sections respectively provided in correspondence with the plurality of processor cores, each of the reconfigurable control sections configured to execute;

    determining whether or not circuit information for a computation to be executed is loaded in each of the reconfigurable devices, and if the circuit information for the computation to be executed is loaded, referring to the lock information and performing only execution of the computation with the reconfigurable device in which the circuit information for the computation to be executed is loaded, without executing the computation to be executed in any of the plurality of processor cores, when the reconfigurable device in which the circuit information for the computation to be executed is loaded is not locked, and if the circuit information for the computation to be executed is not loaded, loading the circuit information for the computation to be executed in one of the reconfigurable devices not locked, by referring to the lock information, performing execution of the computation with the reconfigurable device in which the circuit information for the computation to be executed is loaded and execution of the computation with one of the plurality of processor cores in parallel with each other, and performing control so that results of the execution of the computation completed faster between results of the two executions of the computation performed in parallel with each other are adopted as results of the computation to be executed.

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