SEMICONDUCTOR DEVICE WITH A REDUCED BAND GAP AND PROCESS

• US 20100044720A1
• Filed: 08/19/2008
• Published: 02/25/2010
• Est. Priority Date: 08/19/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Hirler, Franz, Siemieniec, Ralf, Foerster, Christian, Krumrey, Joachim
• Granted Patent: US 7,859,051 B2
• Time in Patent Office: Days
• US Class Current: 257/77
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/161 including two or more of the elements provided for in group H01L29/16 , e.g. alloys H01L29/1604 takes precedence
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7816 Lateral DMOS transistors, i.e. LDMOS transistors

Abstract

The application relates to a semiconductor device made of silicon with regionally reduced band gap and a process for the production of same. One embodiment provides a semiconductor device including a body zone, a drain zone and a source zone. A gate extends between the source zone and the drain zone. A reduced band gap region is provided in a region of the body zone, made of at least ternary compound semiconductor material.

Claims

1. A semiconductor device comprising:

a body zone, a drain zone and a source zone;

a gate which extends between the source zone and the drain zone; and

a reduced band gap region in a region of the body zone, comprising of at least ternary compound semiconductor material.

2. The semiconductor device of claim 1, wherein the ternary compound semiconductor material comprises silicon, germanium and carbon.

3. The semiconductor device of claim 2, wherein germanium and carbon is integrated substitutionally in a silicon host lattice.

4. The semiconductor device of claim 1, wherein the reduced band gap region with the ternary compound semiconductor material is complementarily more strongly doped than the body zone.

5. A semiconductor device made of silicon comprising:

a body zone;

a drain zone which forms a pn-junction with the body zone;

a source zone with the same type of conductivity as the drain zone, the source zone being positioned in the region of the body zone;

a gate which extends between the source zone and the drain zone;

a source electrode which is positioned in a source contact opening and projects into the body zone; and

the source contact opening in the region of the body zone beneath the source electrode having a zone of at least ternary compound semiconductor material with a band gap which is smaller than the band gap of silicon.

6. The semiconductor device of claim 5, wherein the ternary compound semiconductor material comprises silicon, germanium and carbon.

7. The semiconductor device of claim 6, wherein the carbon concentration C in the ternary compound semiconductor material is between 1:

500≦

C≦

1;

20 in relation to silicon and germanium.

8. The semiconductor device of claim 6, wherein the carbon concentration C in the ternary compound semiconductor material is between 1:

200≦

C≦

1;

100 in relation to silicon and germanium.

9. The semiconductor device of claim 6, wherein the germanium concentration in the ternary compound semiconductor material is between 1:

10≦

Ge≦

1;

1 in relation to silicon and carbon.

10. The semiconductor device of claim 6, wherein the germanium concentration in the ternary compound semiconductor material is between 1:

5≦

Ge≦

1;

4 in relation to silicon and carbon.

11. The semiconductor device of claim 6, wherein germanium and carbon is integrated substitutionally in a silicon host lattice.

12. The semiconductor device of claim 5, wherein the region with the ternary compound semiconductor material is complementarily more strongly doped than the body zone.

13. A process for the production of a semiconductor devices with regionally reduced band gap, the process comprising:

providing a silicon semiconductor wafer as the semiconductor substrate;

introducing into the silicon semiconductor wafer semiconductor structures which comprise at least one body zone, one drain zone, one MOS gate and one source zone;

producing source contact openings which project through the source zone into the body zone and terminate shortly before a pn-junction to a drain zone positioned beneath it;

depositing a sequence of layers made of a ternary compound semiconductor material in an lower region of the source contact openings; and

filling the source contact openings with electrically conducting material for a source electrode.

14. The process of claim 13, comprising producing the source contact openings using a dry etching technique.

15. The process of claim 13, comprising producing the sequence of layers made of the ternary compound semiconductor material in the lower region of the source contact openings using chemical or physical gas phase deposition.

16. The process of claim 15, wherein during the deposition of the ternary compound semiconductor materials, doping the sequence of layers with a dopant concentration which is greater than the dopant concentration of the body zone.

17. The process of claim 13, comprising depositing silicon, germanium and carbon as the ternary compound semiconductor material.

18. The process of claim 13, comprising defining the carbon concentration C deposited in the ternary compound semiconductor material between 1:

500≦

C≦

1;

20 in relation to silicon and germanium.

19. The process of claim 13, wherein the carbon concentration C deposited in the ternary compound semiconductor material is between 1:

200≦

C≦

1;

100 in relation to silicon and germanium.

20. The process of claim 13, wherein the germanium concentration deposited in the ternary compound semiconductor material is between 1:

5≦

Ge≦

1;

4 in relation to silicon and carbon.

21. The process of claim 13, wherein germanium and carbon are substitutionally integrated in a silicon host lattice.

22. The process of claim 13, wherein during deposition of the ternary compound semiconductor materials, increasing the dopant concentration in the sequence of layers gradually from the dopant concentration of the body zone to a concentration of up to 10¹⁸ cm³ at the transition to the source electrode material.

23. A process for the production of a semiconductor device with regionally reduced band gap, the process comprising:

providing a silicon semiconductor wafer as the semiconductor substrate;

introducing a trench structure to receive at least one MOS trench gate structure;

introducing semiconductor structures which have at least one body zone, one drain zone, one MOS trench gate and one source zone into the silicon semiconductor wafer;

producing source contact openings which project through the source zone into the body zone and terminate shortly before a pn-junction to a drain zone positioned beneath it;

depositing a sequence of layers made of a ternary compound semiconductor material in a lower region of the source contact openings; and

filling the source contact openings with electrically conductive material for a source electrode.

24. A process for the production of a semiconductor device with regionally reduced band gap, the process comprising:

providing a silicon semiconductor wafer as the semiconductor substrate;

introducing a trench structure to receive a field plate structure and a MOS trench gate structure;

introducing semiconductor structures which have at least one body zone, one drain zone, one field plate, one MOS trench gate and one source zone into the silicon semiconductor wafer;

producing source contact openings which project through the source zone into the body zone and terminate shortly before a pn-junction to a drain zone positioned beneath it;

following completion of the high temperature processes, the deposition of a sequence of layers made of a ternary compound semiconductor material in a lower region of the source contact openings; and

filling of the source contact openings with electrically conductive material for a source electrode.