DIGITAL DISPLAY

• US 20100045690A1
• Filed: 01/04/2008
• Published: 02/25/2010
• Est. Priority Date: 01/04/2007
• Status: Active Grant

• Current Assignee: Citizen Finedevice Co., Ltd. (Citizen Electronics Company Limited)
• Original Assignee: Micron Technology, Inc.
• Inventors: Hollenbeck, David B., Handschy, Mark A., Dallas, James M., Larson, Per Harold
• Granted Patent: US 8,059,142 B2
• Time in Patent Office: Days
• US Class Current: 345/549
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2320/0285 using tables for spatial correction of display data
• CPC Class Codes: G09G 2320/0673 for control of gamma adjustment, e.g. selecting another gamma curve
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/3618 with automatic refresh of the display panel using sense/write circuits
• CPC Class Codes: G09G 3/3629 using liquid crystals having memory effects, e.g. ferroelectric liquid crystals

Abstract

A display system that achieves a gamma characteristic different than 1, such as a gamma characteristic of 2 for example. The gamma characteristic may be selectable and it may be selectable via timing characteristics rather than by varying the intensity of the light source. Defective memory registers are also compensated for by selecting them to store bits of relatively lower significance.

Claims

1. A display, comprising:

an array of pixels that can be driven to different optical states; and

a clock that generates a signal that is used to control the optical state of each pixel in the array of pixels, wherein the signal is varied to achieve a gamma characteristic different than 1.

2. A display as defined in claim 1, further including a light source to illuminate the array of pixels, wherein the light source is not varied in intensity to achieve a non-unity gamma characteristic.

3. A display as defined in claim 1, wherein the achieved gamma characteristic is greater than 1.

4. A display as defined in claim 1, wherein the achieved gamma characteristic is approximately 2.

5. A display as defined in claim 1, wherein the achieved gamma characteristic is programmable.

6. A display, comprising:

an array of pixels that can be driven to different optical states; and

a light source to illuminate the array of pixels;

wherein the display panel provides a gamma characteristic different than 1 without varying the intensity of the light source to achieve a gamma characteristic different than 1.

7. A display as defined in claim 6, further including a clock that generates a signal that is used to control the optical state of each pixel in the array of pixels to drive the pixels, wherein the signal is varied to achieve a gamma characteristic greater than 1.

8. A digital display, comprising:

an array of pixels, each having a selectable optical state; and

a plurality of logic circuits that each receive a pair of digital inputs and provide an output signal based on the digital inputs, wherein the optical state of each pixel is based at least in part on the output signal, wherein each such logic circuit is shared by a number of pixels, the number being between and including 1 and 24.

9. A digital display as defined in claim 8, wherein one of the digital inputs is representative of a ramp value.

10. A digital display as defined in claim 8, wherein one of the digital inputs is representative of a pixel value.

11. A digital display as defined in claim 8, further including other logic circuits that are shared by more than 24 pixels.

12. A digital display as defined in claim 8, wherein the array of pixels includes significantly more rows of pixels than 48.

13. A digital display as defined in claim 8, wherein each pixel includes no more than 700 transistors.

14. A digital display as defined in claim 8, wherein each pixel includes no more than 500 transistors.

15. A digital display as defined in claim 8, wherein each pixel includes no more than 300 transistors.

16. A digital display as defined in claim 8, wherein each pixel includes no more than 200 transistors.

17. A digital display as defined in claim 8, wherein each pixel includes no more than 150 transistors.

18. A digital display as defined in claim 8, wherein each pixel stores more than 2 bits of image data.

19. A digital display as defined in claim 8, wherein each pixel stores more than 8 bits of image data.

20. A digital display as defined in claim 8, wherein each pixel stores more than 24 bits of image data.

21. A digital display as defined in claim 8, wherein each pixel stores 48 bits of image data.

22. A digital display, comprising:

an array of pixels; and

a frame buffer that stores image data for the pixels therein.

23. A digital display as defined in claim 22, wherein the display includes memory registers therein that indicate the rows within the frame buffer that have a defect therein.

24. A digital display as defined in claim 23, wherein the display arranges for relatively lower significant bits of the image data to be stored in the rows within the frame buffer that have defects.

25. A digital display as defined in claim 23, wherein the display arranges for portions of the frame buffer with defective cells to contain data for less easily perceived color than green.

26. A digital display as defined in claim 23, wherein the frame buffer is tested to determine the rows within the frame buffer that have a defect therein and information indicative of those rows is stored in the memory registers.

27. A digital display as defined in claim 22, wherein the polarity of the stored image data is selected to be such that a defect causes a pixel to provide less light than would be displayed by the pixel if there were no defect.

28. A method of operating a digital display, comprising:

providing a display have an array of pixels and a frame buffer;

identifying the rows within the frame buffer that have one or more defects;

storing information indicative of which rows have the defects; and

using the stored information to place relatively lower significant bits of image data in the rows within the frame buffer that have defects.

29. A method as defined in claim 28, further including selecting the polarity of the stored image data to be such that a defect causes a pixel to provide less light than would be displayed by the pixel if there were no defect.

30. A digital display, comprising:

an array of pixels having M columns of pixels and N rows of pixels; and

a clock that generates a clock signal that is provided to the array of pixels to drive the pixels, wherein the rate of the clock signal is no greater than (equation that is a function of M,N).

31. A digital display as defined in claim 30, wherein the clock rate is kept relatively low by writing data to each pixel only once for each frame of data to be displayed.

32. A digital display, comprising:

an array of pixels having M columns and N rows, the pixels including circuitry therein that converts stored data representative of the optical state to be displayed by the pixel into a drive signal for the pixel;

wherein M is at least 400 and N is at least 250.

33. A digital display, comprising:

an array of pixels having M columns and N rows, the pixels storing data therein that is representative of the optical state to be displayed by the pixel, wherein each pixel includes no more than 700 transistors;

wherein M is at least 400 and N is at least 250.34. A digital display as defined in claim 33, wherein each pixel includes no more than 500 transistors.

35. A digital display as defined in claim 33, wherein each pixel includes no more than 300 transistors.

36. A digital display as defined in claim 33, wherein each pixel includes no more than 200 transistors.

37. A digital display as defined in claim 33, wherein each pixel includes no more than 150 transistors.

38. A digital display as defined in claim 33, wherein each pixel stores more than 2 bits of image data.

39. A digital display as defined in claim 33, wherein each pixel stores more than 8 bits of image data.

40. A digital display as defined in claim 33, wherein each pixel stores more than 24 bits of image data.

41. A digital display as defined in claim 33, wherein each pixel stores 48 bits of image data.