METHOD FOR FORMING ACTIVE PILLAR OF VERTICAL CHANNEL TRANSISTOR

• US 20100055917A1
• Filed: 06/26/2009
• Published: 03/04/2010
• Est. Priority Date: 09/02/2008
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Kim, Myung-Ok
• Granted Patent: US 8,158,529 B2
• Time in Patent Office: Days
• US Class Current: 438/706
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/30655 comprising alternated and repeated etching and passivation steps, e.g. Bosch process

Abstract

A method for forming an active pillar of a vertical channel transistor includes forming a hard mask pattern on a substrate, etching vertically the substrate using the hard mask pattern as an etch barrier to form an active pillar, and etching horizontally to remove by-product remaining on the exposed substrate, the hard mask pattern and the active pillar and at the same time to reduce line width of the hard mask pattern and the active pillar, wherein a unit cycle in which the vertical etching and the horizontal etching are each performed subsequently once, respectively, is performed repeatedly at least two times or more. According to the present invention, an active pillar having vertical profiles on its sidewalls and having height and line width (or diameter) required in a highly integrated vertical channel transistor can be provided.

Claims

1. A method for forming an active pillar of a vertical channel transistor, comprising:

forming a hard mask pattern over a substrate;

vertically etching the substrate using the hard mask pattern as an etch barrier to form an active pillar; and

performing horizontal etching to remove by-product remaining on the exposed substrate, the hard mask pattern and the active pillar and at the same time to reduce line width of the hard mask pattern and the active pillar,

wherein a unit cycle in which the vertical etching and the horizontal etching are each performed once is repeated at least two times or more.

2. The method of claim 1, wherein the vertical etching is performed anisotropically.

3. The method of claim 1, wherein the horizontal etching is performed isotropically.

4. The method of claim 1, wherein the vertical etching is performed using at least one of Cl₂, HBr and a gas mixture thereof as a main etching gas.

5. The method of claim 4, wherein the vertical etching is performed using O₂ or inert gas in addition to the main etching gas.

6. The method of claim 1, wherein the horizontal etching is performed using a gas mixture of fluoride gas and inert gas.

7. The method of claim 6, wherein the fluoride gas includes at least one of CF₄, C₂F₆, and C₃F₈.

8. The method of claim 6, wherein the horizontal etching is performed using the gas mixture at a flow rate of approximately 50 sccm to approximately 500 sccm.

9. The method of claim 1, wherein the horizontal etching is performed under a pressure ranging from approximately 10 mtorr to approximately 100 mtorr.

10. The method of claim 1, wherein the horizontal etching is performed using a top power ranging from approximately 200 W to approximately 1,200 W.

11. The method of claim 1, wherein the horizontal etching is performed using a bias power ranging from approximately 0 W to approximately 50 W.

12. A method for forming a pillar of a vertical channel transistor, comprising:

forming a mask pattern over a substrate;

vertically etching the substrate using the mask pattern as an etch barrier to form a pillar;

horizontally etching the vertically etched substrate to horizontally remove by-product remaining on the exposed substrate, the mask pattern and the pillar and reduce horizontal width of the mask pattern and the pillar; and

repeating a cycle of the vertical etching and horizontal etching at least once after completing a first cycle of the vertical etching and horizontal etching.

13. The method of claim 12, wherein the vertical etching is performed anisotropically.

14. The method of claim 12, wherein the horizontal etching is performed isotropically.

15. The method of claim 12, wherein the vertical etching is performed using at least one of Cl₂, HBr and a gas mixture thereof as a main etching gas.

16. The method of claim 15, wherein the vertical etching is performed using O₂ or inert gas in addition to the main etching gas.