METHOD FOR FORMING ACTIVE PILLAR OF VERTICAL CHANNEL TRANSISTOR
First Claim
1. A method for forming an active pillar of a vertical channel transistor, comprising:
- forming a hard mask pattern over a substrate;
vertically etching the substrate using the hard mask pattern as an etch barrier to form an active pillar; and
performing horizontal etching to remove by-product remaining on the exposed substrate, the hard mask pattern and the active pillar and at the same time to reduce line width of the hard mask pattern and the active pillar,wherein a unit cycle in which the vertical etching and the horizontal etching are each performed once is repeated at least two times or more.
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Abstract
A method for forming an active pillar of a vertical channel transistor includes forming a hard mask pattern on a substrate, etching vertically the substrate using the hard mask pattern as an etch barrier to form an active pillar, and etching horizontally to remove by-product remaining on the exposed substrate, the hard mask pattern and the active pillar and at the same time to reduce line width of the hard mask pattern and the active pillar, wherein a unit cycle in which the vertical etching and the horizontal etching are each performed subsequently once, respectively, is performed repeatedly at least two times or more. According to the present invention, an active pillar having vertical profiles on its sidewalls and having height and line width (or diameter) required in a highly integrated vertical channel transistor can be provided.
209 Citations
16 Claims
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1. A method for forming an active pillar of a vertical channel transistor, comprising:
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forming a hard mask pattern over a substrate; vertically etching the substrate using the hard mask pattern as an etch barrier to form an active pillar; and performing horizontal etching to remove by-product remaining on the exposed substrate, the hard mask pattern and the active pillar and at the same time to reduce line width of the hard mask pattern and the active pillar, wherein a unit cycle in which the vertical etching and the horizontal etching are each performed once is repeated at least two times or more. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for forming a pillar of a vertical channel transistor, comprising:
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forming a mask pattern over a substrate; vertically etching the substrate using the mask pattern as an etch barrier to form a pillar; horizontally etching the vertically etched substrate to horizontally remove by-product remaining on the exposed substrate, the mask pattern and the pillar and reduce horizontal width of the mask pattern and the pillar; and repeating a cycle of the vertical etching and horizontal etching at least once after completing a first cycle of the vertical etching and horizontal etching. - View Dependent Claims (13, 14, 15, 16)
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Specification