SPACER CONFIGURED TO PREVENT ELECTRIC CHARGES FROM BEING ACCUMULATED ON THE SURFACE THEREOF AND ELECTRON EMISSION DISPLAY INCLUDING THE SPACER

• US 20100060135A1
• Filed: 10/16/2006
• Published: 03/11/2010
• Est. Priority Date: 10/31/2005
• Status: Active Grant

• Current Assignee: Samsung SDI Company Limited
• Original Assignee: Samsung SDI Company Limited
• Inventors: Park, Chul-Ho
• Granted Patent: US 7,719,176 B2
• Time in Patent Office: Days
• US Class Current: 313/292
• CPC Class Codes: H01J 2329/8625 Spacing members
• CPC Class Codes: H01J 2329/864 characterised by the material
• CPC Class Codes: H01J 2329/8645 with coatings on the lateral surfaces thereof
• CPC Class Codes: H01J 31/127 using large area or array sources, i.e. essentially a source for each pixel group

Abstract

A spacer, disposed between first and second substrates of an electron emission display, includes a main body, a resistive layer arranged on a side surface of the main body, a secondary electron emission preventing layer arranged on the resistive layer, and a diffusion preventing layer arranged between the resistive layer and the secondary electron emission layer. The diffusion preventing layer prevents interdiffusion between the resistive layer and the secondary electron emission preventing layer.

Claims

1. A spacer, comprising:

a main body;

a resistive layer arranged on a side surface of the main body;

a secondary electron emission preventing layer arranged on the resistive layer; and

a diffusion preventing layer arranged between the resistive layer and the secondary electron emission preventing layer, the diffusion preventing layer adapted to prevent interdiffusion between the resistive layer and the secondary electron emission preventing layer;

wherein the diffusion preventing layer has a resistivity lower than that of the secondary electron emission preventing layer but higher than that of the resistive layer.

3. The spacer of claim 1, wherein the diffusion preventing layer comprises either a metal nitride layer or a metal oxide layer.

4. The spacer of claim 3, wherein the metal nitride layer comprises either Cr or Ti.

5. The spacer of claim 3, wherein the metal oxide layer comprises a material selected from a group consisting of Cr, Ti, Zr, and Hf.

6. The spacer of claim 1, wherein the resistive layer comprises a highly resistive material.

7. The spacer of claim 6, wherein the highly resistive material comprises a metal selected from a group consisting of Ag, Ge, Si, Al, W, Au, or an alloy thereof and a compound selected from a group consisting of Si₃N₄, AlN, PtN, GeN, or a combination thereof.

8. The spacer of claim 1, wherein the secondary electron emission preventing layer comprises a material having a secondary electron emission coefficient within a range of 1 to 1.8.

9. The spacer of claim 1, wherein the secondary electron emission preventing layer comprises a material selected from a group consisting of diamond-like carbon, Nd₂O₃, and Cr₂O₃.

10. The spacer of claim 1, further comprising contact electrodes arranged on respective top and bottom surfaces of the main body.

11. The spacer of claim 10, wherein the contact electrodes comprise a material selected from a group consisting of Ni, Cr, Mo, and Al.

2. (canceled)

12. An electron emission display, comprising:

first and second substrates adapted to form a vacuum envelope;

an electron emission unit arranged on the first substrate;

a light emission unit arranged on the second substrate; and

a spacer disposed between the first and second substrates, the spacer including;

a main body;

a resistive layer arranged on a side surface of the main body;

a secondary electron emission preventing layer arranged on the resistive layer; and

a diffusion preventing layer arranged between the resistive layer and the secondary electron emission preventing layer and adapted to prevent interdiffusion between the resistive layer and the secondary electron emission preventing layer;

wherein the diffusion preventing layer has a resistivity lower than that of the secondary electron emission preventing layer but higher than that of the resistive layer.

14. The electron emission display of claim 12, wherein the diffusion preventing layer comprises either a metal nitride layer or a metal oxide layer.

15. The electron emission display of claim 14, wherein the metal nitride layer comprises Cr or Ti.

16. The electron emission display of claim 14, wherein the metal oxide layer comprises a material selected from a group consisting of Cr, Ti, Zr, and Hf.

17. The electron emission display of claim 12, wherein the resistive layer comprises a highly resistive material.

18. The electron emission display of claim 17, wherein the highly resistive material comprises metal selected from a group consisting of Ag, Ge, Si, Al, W, Au, or an alloy thereof and a compound selected from a group consisting of Si₃N₄, AlN, PtN, GeN, or a combination thereof.

19. The electron emission display of claim 12, wherein the secondary electron emission preventing layer comprises a material having a secondary electron emission coefficient within a range of 1 to 1.8.

20. The electron emission display of claim 19, wherein the secondary electron emission preventing layer comprises a material selected from a group consisting of diamond-like carbon, Nd₂O₃, and Cr₂O₃.

21. The electron emission display of claim 12, further comprising contact electrodes arranged on respective top and bottom surfaces of the main body.

22. The electron emission display of claim 12, wherein the electron emission unit comprises electron emission regions and electrodes adapted to drive the electron emission regions.

23. The electron emission display of claim 22, wherein the electron emission regions comprise a material selected from a group consisting of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, fullerene (C₆₀), silicon nanowires, and a combination thereof.

24. The electron emission display of claim 12, further comprising a focusing electrode arranged between the first and second substrates.

13. (canceled)