METHODS AND APPARATUS RELATED TO LOW LATENCY WITHIN A DATA CENTER
First Claim
1. An apparatus, comprising;
- a switch core having a multi-stage switch fabric, the multi-stage switch fabric having a plurality of ingress ports and a plurality of egress ports, the switch core configured to be coupled to a plurality of edge devices via the plurality of ingress ports and the plurality of egress ports,the switch core configured to receive a packet from an ingress port from the plurality of ingress ports, the switch core configured to send a plurality of cells associated with the packet from the ingress port to an egress port from the plurality of egress ports without a store-and-forward delay associated with a zero-load latency for the switch core.
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Accused Products
Abstract
In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. The multi-stage switch fabric has a set of ingress ports and a set of egress ports. The switch core can be configured to be coupled to a set of edge devices via the set of ingress ports and the set of egress ports. The switch core can be configured to receive a packet from an ingress port from the set of ingress ports. The switch core can be configured to send a set of cells associated with the packet from the ingress port to an egress port from the set of egress ports without a store-and-forward delay associated with a zero-load latency for the switch core.
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Citations
21 Claims
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1. An apparatus, comprising;
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a switch core having a multi-stage switch fabric, the multi-stage switch fabric having a plurality of ingress ports and a plurality of egress ports, the switch core configured to be coupled to a plurality of edge devices via the plurality of ingress ports and the plurality of egress ports, the switch core configured to receive a packet from an ingress port from the plurality of ingress ports, the switch core configured to send a plurality of cells associated with the packet from the ingress port to an egress port from the plurality of egress ports without a store-and-forward delay associated with a zero-load latency for the switch core. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus, comprising;
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a switch core having a multi-stage switch fabric, the multi-stage switch fabric having a plurality of ingress ports and a plurality of egress ports, the switch core configured to be coupled to a plurality of edge devices via the plurality of ingress ports and the plurality of egress ports, the switch core configured to receive a packet from each ingress port from the plurality of ingress ports, the switch core configured to send a plurality of cells associated with each packet from the associated ingress port to an associated egress port from the plurality of egress ports such that a latency for each cell is substantially independent of a path within the multi-stage switch fabric of the switch core traversed by that cell when a cabling topology of the switch core is symmetrical and when link of the cabling topology are fully operational. - View Dependent Claims (10, 11, 12, 13, 14)
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15. An apparatus, comprising;
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a switch core having a multi-stage switch fabric, the multi-stage switch fabric having a plurality of ingress ports and a plurality of egress ports, the plurality of ingress ports numbering at least 1,000 ports, the plurality of egress ports numbering at least 1,000 ports, the switch core configured to be coupled to a plurality of edge devices via the plurality of ingress ports and the plurality of egress ports, the switch core configured to receive a packet from an ingress port from the plurality of ingress ports, the switch core configured to send a plurality of cells associated with the packet from the ingress port to an egress port from the plurality of egress ports such at a zero-load latency excluding speed-of-light latency or a congestion latency excluding speed-of-light latency is less than 15 μ
sec. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification