METHODS AND APPARATUS RELATED TO VIRTUALIZATION OF DATA CENTER RESOURCES

• US 20100061389A1
• Filed: 06/30/2009
• Published: 03/11/2010
• Est. Priority Date: 09/11/2008
• Status: Active Grant

• Current Assignee: Juniper Networks Incorporated
• Original Assignee: Juniper Networks Incorporated
• Inventors: Aybay, Gunes, Frailong, Jean-Marc, Sindhu, Pradeep, Vohra, Quaizar, Venkatramani, Anjan
• Granted Patent: US 9,847,953 B2
• Time in Patent Office: Days
• US Class Current: 370/412
• CPC Class Codes: H04L 49/00 Packet switching elements
• CPC Class Codes: H04L 49/1515 Non-blocking multistage, e.g. Clos
• CPC Class Codes: H04L 49/251 Cut-through or wormhole routing
• CPC Class Codes: H04L 49/35 Switches specially adapted for specific applications
• CPC Class Codes: H04L 49/356 for storage area networks
• CPC Class Codes: H04L 49/70 Virtual switches

Abstract

In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. A first set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have a protocol. Each peripheral processing device from the first set of peripheral processing devices is a storage node that has virtualized resources. The virtualized resources of the first set of peripheral processing devices collectively define a virtual storage resource interconnected by the switch core. A second set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have the protocol. Each peripheral processing device from the first set of peripheral processing devices is a compute node that has virtualized resources. The virtualized resources of the second set of peripheral processing devices collectively define a virtual compute resource interconnected by the switch core.

Claims

1. An apparatus, comprising:

a switch core having a multi-stage switch fabric;

a first plurality of peripheral processing devices coupled to the multi-stage switch fabric by a plurality of connections having a protocol, each peripheral processing device from the first plurality of peripheral processing devices being a storage node having virtualized resources, the virtualized resources of the first plurality of peripheral processing devices collectively defining a virtual storage resource interconnected by the switch core; and

a second plurality of peripheral processing devices coupled to the multi-stage switch fabric by a plurality of connections having the protocol, each peripheral processing device from the first plurality of peripheral processing devices being a compute node having virtualized resources, the virtualized resources of the second plurality of peripheral processing devices collectively defining a virtual compute resource interconnected by the switch core.

2. The apparatus of claim 1, wherein:

each peripheral processing device from the first plurality of peripheral processing devices having virtualized resources, each peripheral processing device from the first plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the first plurality of peripheral processing devices; and

each peripheral processing device from the second plurality of peripheral processing having virtualized resources, each peripheral processing device from the second plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the second plurality of peripheral processing devices.

3. The apparatus of claim 1, wherein:

the first plurality of peripheral processing devices being associated with a packet-based communication protocol and associated with a security protocol; and

the second plurality of peripheral processing devices being associated with the packet-based communication protocol and associated with the security protocol.

4. An apparatus, comprising;

a switch core having a multi-stage switch fabric, the multi-stage switch fabric having a plurality of ingress ports and a plurality of egress ports;

a first peripheral processing device coupled to an ingress port from the plurality of ingress ports and coupled to an egress port from the plurality of egress ports via a connection defined by an open standard interface; and

a second peripheral processing device coupled to an ingress port from the plurality of ingress ports and coupled to an egress port from the plurality of egress ports via a connection defined by the open standard interface,

the first peripheral processing device being a first storage node having virtualized resources, the first peripheral processing device configured such that the virtualized resources is substitutable with virtualized resources of a second storage node associated with the switch core,

the second peripheral processing device being a first compute node having virtualized resources, the second peripheral processing device configured such that the virtualized resources is substitutable with virtualized resources of a second compute node associated with the switch core.

5. The apparatus of claim 4, wherein:

the first peripheral processing device is one of a computer node, a storage node, a service node and a router, and

the second peripheral processing device is one remaining the computer node, the storage node, the service node and the router.

6. The apparatus of claim 4, wherein:

the first peripheral processing device is a computer node,

the second peripheral processing is a storage node, and

the packet-based communication protocol is Ethernet having a bandwidth of at least 10 Gb/s.

7. An apparatus, comprising:

a switch core having a multi-stage switch fabric associated with a cell-based communication protocol;

a first plurality of peripheral processing devices coupled to the multi-stage switch fabric by a plurality of connections associated with a packet-based communication protocol, each peripheral processing device from the first plurality of peripheral processing devices being a first node type and associated with a security protocol; and

a second plurality of peripheral processing devices coupled to the multi-stage switch fabric by a plurality of connections associated with the packet-based communication protocol, each peripheral processing device from the second plurality of peripheral processing devices being a second node type and associated with the security protocol.

8. The apparatus of claim 7, wherein:

each peripheral processing device from the first plurality of peripheral processing devices being a storage node having virtualized resources, the virtualized resources of the first plurality of peripheral processing resources collectively defining a virtual storage resource interconnected by the switch core, and

each peripheral processing device from the second plurality of peripheral processing devices being a compute node having virtualized resources, the virtualized resources of the second plurality of peripheral processing resources collectively defining a virtual compute resource interconnected by the switch core.

9. The apparatus of claim 7, wherein:

each peripheral processing device from the first plurality of peripheral processing devices having virtualized resources, each peripheral processing device from the first plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the first plurality of peripheral processing devices; and

each peripheral processing device from the second plurality of peripheral processing having virtualized resources, each peripheral processing device from the second plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the second plurality of peripheral processing devices

10. The apparatus of claim 7, wherein:

the first node type is one of a computer node type, a storage node type, a service node type and a router type, and

the second node type is one remaining the computer node type, the storage node type, the service node type and the router type.

11. The apparatus of claim 7, wherein:

the first node type is a computer node type,

the second node type is a storage node type, and

the packet-based communication protocol is Ethernet having a bandwidth of at least 10 Gb/s.

12. An apparatus, comprising:

a switch core having a multi-stage switch fabric, the switch core configured to be logically partitioned into a first virtual switch core and a second virtual switch core;

a plurality of peripheral processing devices coupled to the multi-stage switch fabric, the plurality of peripheral processing devices having a first subset of peripheral processing devices operatively coupled to the first virtual switch core and a second subset of peripheral processing devices operatively coupled to the second virtual switch core.

13. The apparatus of claim 12, wherein:

the switch core is configured such that the first virtual switch core and the second virtual switch core each is administratively managed independently from the other.

14. The apparatus of claim 12, wherein:

the switch core is configured such that the first virtual switch core has a bandwidth independent from a bandwidth of the second virtual switch core.

15. The apparatus of claim 12, wherein:

the switch core is configured such that the first virtual switch core has a bandwidth and administrative management independent from a bandwidth and an administrative management of the second virtual switch core.

16. The apparatus of claim 12, wherein:

the switch core is configured such that the first virtual switch core operates with layer-2 protocol and the second virtual switch core operates with layer-2 protocol and layer-3 protocol.

17. The apparatus of claim 12, wherein:

the first subset of peripheral processing devices having virtual resources, the second subset of peripheral processing devices having virtual resources.

18. The apparatus of claim 12, wherein:

the first subset of peripheral processing devices includes a peripheral processing device that is one of a compute node, a storage node, service node and a router, and includes a peripheral processing device that is a remaining one of a compute node, a storage node, service node and a router; and

the second subset of peripheral processing devices includes a peripheral processing device that is one of a compute node, a storage node, service node and a router, and includes a peripheral processing device that is a remaining one of a compute node, a storage node, service node and a router.