METHOD FOR MANUFACTURING THIN FILM TRANSISTOR USING OXIDE SEMICONDUCTOR AND DISPLAY APPARATUS

• US 20100065837A1
• Filed: 11/29/2007
• Published: 03/18/2010
• Est. Priority Date: 12/05/2006
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Kaji, Nobuyuki, Yabuta, Hisato, Hayashi, Ryo, Omura, Hideyuki
• Granted Patent: US 8,143,115 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere, patterning the second insulating film to expose a pair of contact regions, forming an electrode layer on the pair of contact regions, and patterning the electrode layer to for a source electrode and a drain electrode.

Claims

1. A method of manufacturing a thin film transistor having on a substrate, at least a gate electrode, a first insulating film, an oxide semiconductor layer, a second insulating film, a source electrode and a drain electrode, comprising the steps of:

forming a gate electrode on a substrate;

forming a first insulating film on the gate electrode;

forming an oxide semiconductor layer on the first insulating film with an amorphous oxide;

patterning the first insulating film;

patterning the oxide semiconductor layer;

forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere;

patterning the second insulating film to expose a pair of contact regions in the oxide semiconductor layer and lower the electric resistance of the contact regions;

forming an electrode layer on the pair of contact regions; and

patterning the electrode layer to form a source electrode and a drain electrode.

3. The method according to claim 1, wherein a mixture gas of O₂/Ar is used for the oxidative-gas-containing atmosphere and the mixture ratio is not less than 10 vol %.

4. The method according to claim 1, wherein the amorphous oxide is an oxide containing at least In, Zn and Sn or contains In, Zn and Ga.

5. The method according to claim 1, wherein the second insulating film is an amorphous oxide insulator containing oxygen atoms such that the level of O₂⁺ observed as desorbed gas by means of temperature programmed desorption mass spectrometry is not less than 3.8×

10¹⁹/cm³.

6. A thin film transistor manufactured by the manufacturing method according to claim 1.

7. A display apparatus comprising the thin film transistor according to claim 6, wherein the source or drain electrode of the thin film transistor is connected to an electrode of a display device.

8. The apparatus according to claim 7, wherein the device is an electroluminescent device.

9. The apparatus according to claim 7, wherein the device is a liquid crystal cell.

10. The apparatus according to claim 7, wherein a plurality of display devices and a plurality of thin film transistors are arranged two-dimensionally on a substrate.

2. A method of manufacturing a thin film transistor having on a substrate, at least a gate electrode, an oxide semiconductor layer, a second insulating film, a source electrode and a drain electrode, comprising the steps of:

forming an oxide semiconductor layer on a substrate with an amorphous oxide;

patterning the oxide semiconductor layer;

forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere;

patterning the second insulating film to expose a pair of contact regions in the oxide semiconductor layer and lower the electric resistance of the pair of contact regions;

forming an electrode layer on the pair of contact regions and on the second insulating film; and

patterning the electrode layer to form a source electrode, a drain electrode and a gate electrode.