CONTROL CIRCUIT FOR SINGLE CHIP IC

• US 20100066342A1
• Filed: 11/07/2008
• Published: 03/18/2010
• Est. Priority Date: 09/17/2008
• Status: Abandoned Application

• Current Assignee: Holtek Semiconductor Incorporated
• Original Assignee: Holtek Semiconductor Incorporated
• Inventors: Liao, Chun-Yao
• Application Number:
  US12/266,620
• Publication Number:
  US 20100066342A1
• Time in Patent Office: Days
• US Class Current: 323/318
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: H03K 19/0016 by using a control or a clock signal, e.g. in order to apply power supply
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A control circuit for a single chip IC controlled by an external power is provided. The control circuit includes a regulating circuit, an MCU and a trigger circuit. The regulating circuit is controlled by the external power and includes a regulator to be enabled to generate an internal power for an internal circuit of the single chip IC. The MCU is controlled by the internal power and generates a switch signal to disable the regulator when the internal circuit of the single chip IC is standby. The trigger circuit is controlled by the external power and generates a trigger signal to enable the regulator based on an external signal.

Claims

1. A control circuit for a single chip IC controlled by an external power, comprising:

a regulating circuit controlled by the external power and comprising a regulator to be enabled to generate an internal power for an internal circuit of the single chip IC;

an MCU controlled by the internal power and generating a switch signal to disable the regulator when the internal circuit of the single chip IC is standby; and

a trigger circuit controlled by the external power and generating a trigger signal based on an external signal to enable the regulator.

2. A control circuit as claimed in claim 1, wherein the regulating circuit further comprises:

a level shifter controlled by the external power and coupled to the MCU for receiving the switch signal and generating a level shifting signal; and

a register controlled by the external power for enabling the regulator when receiving the trigger signal and disabling the regulator when receiving the level shifting signal.

3. A control circuit as claimed in claim 2, wherein the regulating circuit further comprises:

a low-voltage detector controlled by the external power and coupled to the level shifter for disabling the level shifter when detecting a low level of the internal power from the regulator.

4. A control circuit as claimed in claim 1, wherein the regulating circuit further comprises:

a level shifter controlled by the external power and coupled to the MCU for receiving the switch signal and generating a level shifting signal; and

an SR latch controlled by the external power for enabling the regulator when receiving the trigger signal and disabling the regulator when receiving the level shifting signal.

5. A control circuit as claimed in claim 4, wherein the regulating circuit further comprises:

a low-voltage detector controlled by the external power and coupled to the level shifter for disabling the level shifter when detecting a low level of the internal power from the regulator.