Panel Array

• US 20100066631A1
• Filed: 06/15/2009
• Published: 03/18/2010
• Est. Priority Date: 09/21/2006
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Bozza, Donald A., Alm, Roberto W., Puzella, Angelo M., Dupuis, Patricia S., Licciardello, Joseph A., Komisarek, Kenneth S., Francis, John B.
• Granted Patent: US 8,279,131 B2
• Time in Patent Office: Days
• US Class Current: 343/853
• CPC Class Codes: H01Q 1/02 Arrangements for de-icing; Arrangements for drying-out ; Arrangements for cooling; Arrangements for preventing corrosion
• CPC Class Codes: H01Q 21/00 Antenna arrays or systems arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system H01Q3/00
• CPC Class Codes: H01Q 21/0025 Modular arrays
• CPC Class Codes: H01Q 21/0087 Apparatus or processes specially adapted for manufacturing antenna arrays manufacturing waveguides H01P11/00
• CPC Class Codes: H01Q 21/065 Patch antenna array
• CPC Class Codes: H01Q 9/0414 in a stacked or folded configuration
• CPC Class Codes: Y10T 29/49018 with other electrical component

Abstract

A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.

Claims

1. A method for fabricating a panel array provided from a multilayer printed wiring board (PWB) comprised of a plurality of circuit boards, the method comprising:

(a) imaging all layers on each circuit board comprising the PWB;

(b) etching all layers on each circuit board comprising the PWB including etching RF matching pads and inspecting each etched layer;

(c) aligning each of the plurality of circuit boards including inserting pre-preg material between each of the circuit boards;

(d) laminating the circuit boards to provide a laminated circuit board assembly wherein laminating comprises heating the circuit boards to a predetermine temperature and applying a predetermined amount of pressure to the circuit boards for a predetermined amount of time; and

(e) drilling a first plurality of holes in the laminated circuit board assembly wherein each of the first plurality of holes extend from a top-most layer to a bottom-most layer of the laminated circuit board assembly wherein the laminated printed circuit board assembly comprises;

an antenna element, an RF antenna feed circuit coupled to the at least one antenna element, and RF power distribution circuit, a DC power distribution circuit and a logic signal distribution circuit.

2. The method of claim 1 further comprising (f) plating each of the holes drilled in the laminated circuit board assembly to complete electrical interconnections between RF, DC power and/or logic circuits.

3. The method of claim 2 further comprising (g) filling each of the plurality of all holes to provide a solid multi-layer laminated circuit board assembly.

4. The method of claim 2 further comprising (h) disposing electrical components on an external surface of the solid multilayer laminated circuit board assembly.

5. The method of claim 4 further comprising:

(i) performing a solder re-flow operation to couple the electrical components to the external surface of the solid multilayer laminated circuit board assembly;

(j) bonding a metal cover over at least some of the electrical components; and

(k) apply conformal coating over the external surface of the solid multilayer laminated circuit board assembly on which are disposed the electrical components.

6. The method of claim 5 further comprising adding ink resistors on all RF layers having Wilkinson-type power divider circuits.

7. The method of claim 6 wherein the electrical components are flip-chip circuits which are directly bonded to the external surface of the solid multilayer laminated circuit board assembly.

8. The method of claim 4 further comprising mounting a heat sink over the flip-chip circuits.

9. The method of claim 8 wherein mounting a heat sink over the flip-chip circuits comprises mounting a liquid cooled brazement over the flip-chip circuits.

10. A panel array comprising:

a multilayer laminated circuit board assembly having first and second opposing surfaces, said multilayer laminated circuit board assembly comprised of a plurality of circuit boards with at least a first one of the circuit boards having a plurality of radiating antenna elements disposed thereon so as to radiate through the first surface of said multilayer laminated circuit board assembly, at least a second one of the circuit boards having an RF feed circuit disposed thereon, at least a third one of the circuit boards having logic circuits disposed thereon and at least a fourth one of the circuit boards having a DC circuit disposed thereon and wherein the first surface of said multilayer laminated circuit board assembly corresponds to a top-most layer of said multilayer laminated circuit board assembly and the second surface of said multilayer laminated circuit board assembly corresponds to a bottom-most layer of said multilayer laminated circuit board assembly and wherein said multilayer laminated circuit board assembly further includes a first plurality of plated through holes extending from the top-most layer to the bottom-most layer of said multilayer laminated circuit board assembly with the first plurality of plated through holes forming a waveguide cage around the radiating antenna element; and

a plurality of flip-chip circuits disposed on the bottom-most layer of said multilayer laminated circuit board assembly.

11. The panel array of claim 10 further comprising a heat sink disposed over said flip-chip circuits.

12. The panel array of claim 11 further comprising one or more flex circuits electrically coupled to the DC and logic circuits on said multilayer laminated circuit board assembly.

13. The panel array of claim 12 further comprising one or more RF connectors coupled to one or more of the RF circuits said multilayer laminated circuit board assembly.

14. The panel array of claim 13 further comprising a heat sink disposed over said flip-chip circuits.

15. The multilayer printed wiring (PWB) of claim 14 wherein said heat sink is provided as a liquid cooled brazement.

16. A multilayer printed wiring (PWB) which forms a panel array, the PWB comprising:

a plurality of printed circuit boards (PCBs) with at least a first one of the PCBs having a first plurality of radiating antenna elements disposed thereon, at least a second one of the PCBs having an RF feed circuit disposed thereon, said RF feed electrically coupled to said plurality of radiating antenna elements, at least a third one of the PCBs having logic circuits disposed thereon and at least a fourth one of the PCBs having a DC circuit disposed thereon;

a first plurality of waveguide cages, each of said first plurality of waveguide cages disposed about a corresponding one of said first plurality of radiating antenna elements wherein each of said first plurality of waveguide cages formed from plated-through holes extending from a first outermost layer of the PWB to a second outermost layer of the PWB, said waveguide cage disposed.

17. The multilayer printed wiring (PWB) of claim 16 further comprising a plurality of flip-chip circuits disposed on the bottom-most layer of said PWB.

18. The panel array of claim 17 further comprising a heat sink disposed over said flip-chip circuits.

The multilayer printed wiring (PWB) of claim 18 wherein said heat sink is provided as a liquid cooled brazement.