METHOD FOR TUNING A WORK FUNCTION OF HIGH-K METAL GATE DEVICES
First Claim
1. A method of fabricating a semiconductor device comprising:
- providing a semiconductor substrate;
forming a first transistor and a second transistor in the substrate, the first transistor having a first gate structure that includes a first dummy gate, the second transistor having a second gate structure that includes a second dummy gate;
removing the first dummy gate and the second dummy gate thereby forming a first trench and a second trench, respectively;
forming a first metal layer to partially fill the first and second trenches;
removing the first metal layer within the first trench;
forming a second metal layer to partially fill the first and second trenches;
forming a third metal layer to partially fill the first and second trenches;
performing a thermal process to reflow the second metal layer and the third metal layer; and
forming a fourth metal layer to fill a remainder of the first and second trenches.
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Accused Products
Abstract
The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming first and second transistors in the substrate, the first transistor having a first gate structure that includes a first dummy gate, the second transistor having a second gate structure that includes a second dummy gate, removing the first and second dummy gates thereby forming a first trench and a second trench, respectively, forming a first metal layer to partially fill in the first and second trenches, removing the first metal layer within the first trench, forming a second metal layer to partially fill in the first and second trenches, forming a third metal layer to partially fill in the first and second trenches, reflowing the second metal layer and the third metal layer, and forming a fourth metal layer to fill in the remainder of the first and second trenches.
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Citations
20 Claims
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1. A method of fabricating a semiconductor device comprising:
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providing a semiconductor substrate; forming a first transistor and a second transistor in the substrate, the first transistor having a first gate structure that includes a first dummy gate, the second transistor having a second gate structure that includes a second dummy gate; removing the first dummy gate and the second dummy gate thereby forming a first trench and a second trench, respectively; forming a first metal layer to partially fill the first and second trenches; removing the first metal layer within the first trench; forming a second metal layer to partially fill the first and second trenches; forming a third metal layer to partially fill the first and second trenches; performing a thermal process to reflow the second metal layer and the third metal layer; and forming a fourth metal layer to fill a remainder of the first and second trenches. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of fabricating a semiconductor device comprising:
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providing a semiconductor substrate; forming a first transistor and a second transistor in the substrate, the first transistor including a first gate structure, the second transistor including a second gate structure, the first gate structure and the second gate structure each including a high-k dielectric layer formed over the substrate, a barrier layer formed over the high-k dielectric layer, and a dummy poly layer formed over the barrier layer; removing the dummy poly layer from the first and second gate structures thereby forming first and second trenches, respectively; forming a P-type work function metal (P-metal) to partially fill in the first and second trenches; removing the P-metal within the first trench; forming a layer of Ti to partially fill in the first and second trenches; forming a layer of Al to partially fill in the first and second trenches; reflowing the Al layer and Ti layer to form a layer of TiAl; and forming a fill metal layer to fill in the remainder of the first and second trenches. - View Dependent Claims (12, 13, 14, 15)
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16. A method of fabricating a semiconductor device comprising:
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providing a semiconductor substrate; forming a first transistor and a second transistor in the substrate, the first transistor including a first gate structure, the second transistor including a second gate structure, the first and second gate structures each including a high-k dielectric layer formed over the substrate, a barrier layer formed over the high-k dielectric layer, and a dummy poly layer formed over the barrier layer; removing the dummy poly layer from the first and second gate structures thereby forming first and second trenches, respectively; forming a P-type work function metal (P-metal) to partially fill the first and second trenches; removing the P-metal within the first trench; forming a layer of Ti to partially fill the first and second trenches; forming a layer of Al to partially fill in the first and second trenches; reflowing the Al layer and Ti layer to form a layer of TiAl; performing a chemical mechanical polishing (CMP) to remove the various metal layers disposed outside the first and second trenches; and forming a fill metal layer to fill a remainder of the first and second trenches. - View Dependent Claims (17, 18, 19, 20)
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Specification