METHOD AND SYSTEM FOR FRAME TIMING ACQUISITION IN EVOLVED UNIVERSAL TERRESTRIAL RADIO ACCESS (EUTRA)

• US 20100069106A1
• Filed: 10/15/2008
• Published: 03/18/2010
• Est. Priority Date: 09/12/2008
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Kent, Mark, Swarts, Francis
• Granted Patent: US 8,170,592 B2
• Time in Patent Office: Days
• US Class Current: 455/502
• CPC Class Codes: H04J 11/0069 Cell search, i.e. determining cell identity [cell-ID] design of multiplexing codes H04J13/00; processing access restriction or access information H04W48/16; discovery of network devices for network data management H04W8/005; sounding signals for channel estimation H04L25/0226; structure of reference signals in multicarrier modulation systems H04L27/2613; frame, time or carrier synchronisation in multicarrier modulation systems H04L27/2655
• CPC Class Codes: H04W 56/00 Synchronisation arrangements

Abstract

Aspects of a method and system for frame timing acquisition in evolved universal terrestrial radio access (EUTRA) may include determining a received secondary synchronization sequence (SSS) based on a selected cyclic prefix length and on synchronization of a primary synchronization sequence (PSS). A first portion of information associated with the received SSS may be processed separately from a second portion of information associated with the received SSS. A frame timing and/or base station identifier may be determined by comparing the processed first portion of information with the processed second portion of information. The cyclic prefix length may be selected from a finite set of possible cyclic prefix lengths. The cyclic prefix length may be, for example, 9 samples or 32 samples. The primary synchronization sequence synchronization may be determined via correlation.

Claims

1. A method for processing communication signals, the method comprising:

determining a received secondary synchronization sequence (SSS) based on a selected cyclic prefix length and synchronization of a primary synchronization sequence (PSS);

processing a first portion of information associated with said received SSS separately from a second portion of information associated with said received SSS; and

determining a frame timing and/or base station identifier, by comparing said processed first portion of information with said processed second portion of information.

2. The method according to claim 1, comprising selecting said cyclic prefix length from a finite set of possible cyclic prefix lengths;

3. The method according to claim 1, comprising selecting said cyclic prefix length from a finite set of possible cyclic prefix lengths comprising 9 samples and 32 samples.

4. The method according to claim 1, comprising determining said primary synchronization sequence synchronization via correlation.

5. The method according to claim 1, comprising determining said primary synchronization sequence synchronization by determining a slot timing and a channel estimate via PSS processing.

6. The method according to claim 1, wherein at least a part of said first portion of information is associated with one or more odd sub-carrier positions, and is processed separately from at least a part of said first portion of information that is associated with one or more even sub-carrier positions.

7. The method according to claim 1, wherein at least a part of said second portion of information is associated with one or more odd sub-carrier positions, and is processed separately from at least a part of said second portion of information that is associated with one or more even sub-carrier positions.

8. The method according to claim 1, wherein odd sub-carrier positions and even sub-carrier positions associated with said secondary synchronization sequence are scrambled a plurality of times.

9. The method according to claim 1, comprising determining said frame timing by determining whether said selected cyclic prefix length results in consistently decoded information, wherein said consistency of said decoded information is determined by comparing said processed first portion of information with said processed second portion of information.

10. The method according to claim 1, wherein said first portion of information comprises a first half-frame, and said second portion of information comprises a second half-frame.

11. A system for processing communication signals, the system comprising:

one or more circuits operable to, at least;

determine a received secondary synchronization sequence (SSS) based on an selected cyclic prefix length and synchronization of a primary synchronization sequence (PSS);

process a first portion of information associated with said received SSS separately from a second portion of information associated with said received SSS; and

determine a frame timing and/or base station identifier, by comparing said processed first portion of information with said processed second portion of information.

12. The system according to claim 11, wherein said one or more circuits select said cyclic prefix length from a finite set of possible cyclic prefix lengths;

13. The system according to claim 11, wherein said one or more circuits select said cyclic prefix length from a finite set of possible cyclic prefix lengths comprising 9 samples and 32 samples.

14. The system according to claim 11, wherein said one or more circuits determine said primary synchronization sequence synchronization via correlation.

15. The system according to claim 11, wherein said one or more circuits determine said primary synchronization sequence synchronization by determining a slot timing and a channel estimate via PSS processing.

16. The system according to claim 11, wherein at least a part of said first portion of information is associated with one or more odd sub-carrier positions, and is processed separately from at least a part of said first portion of information that is associated with one or more even sub-carrier positions.

17. The system according to claim 11, wherein at least a part of said second portion of information is associated with one or more odd sub-carrier positions, and is processed separately from at least a part of said second portion of information that is associated with one or more even sub-carrier positions.

18. The system according to claim 11, wherein odd sub-carrier positions and even sub-carrier positions associated with said secondary synchronization sequence are scrambled once and twice respectively, or vice versa.

19. The system according to claim 11, wherein said one or more circuits determine said frame timing by determining whether said selected cyclic prefix length results in consistently decoded information, wherein said consistency of said decoded information is determined by comparing said processed first portion of information with said processed second portion of information.

20. The system according to claim 11, wherein said first portion of information is a first half-frame, and said second portion of information is a second half-frame.