SPLIT-GATE NON-VOLATILE MEMORY CELL AND METHOD
First Claim
1. A method of making a non-volatile memory cell on a semiconductor substrate, comprising:
- forming a select gate structure over the substrate wherein the select gate structure has a first sidewall; and
growing a first epitaxial layer on the substrate in a region adjacent to the first sidewall;
forming a charge storage layer over the first epitaxial layer; and
forming a control gate over the charge storage layer.
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Abstract
A method is disclosed for making a non-volatile memory cell on a semiconductor substrate. A select gate structure is formed over the substrate. The control gate structure has a sidewall. An epitaxial layer is formed on the substrate in a region adjacent to the sidewall. A charge storage layer is formed over the epitaxial layer. A control gate is formed over the charge storage layer. This allows for in-situ doping of the epitaxial layer under the select gate without requiring counterdoping. It is beneficial to avoid counterdoping because counterdoping reduces charge mobility and increases the difficulty in controlling threshold voltage. Additionally there may be formed a recess in the substrate and the epitaxial layer is formed in the recess, and a halo implant can be performed, prior to forming the epitaxial layer, through the recess into the substrate in the area under the select gate.
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Citations
20 Claims
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1. A method of making a non-volatile memory cell on a semiconductor substrate, comprising:
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forming a select gate structure over the substrate wherein the select gate structure has a first sidewall; and growing a first epitaxial layer on the substrate in a region adjacent to the first sidewall; forming a charge storage layer over the first epitaxial layer; and forming a control gate over the charge storage layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of forming a non-volatile memory cell, comprising:
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forming a select gate over a substrate; forming a first recess in the substrate one on a first side of the select gate and a second recess in the substrate on a second side of the select gate; growing a first epitaxial region in the first recess and a second epitaxial region in the second recess; forming a charge storage layer over the second epitaxial region; and forming a control gate over the charge storage layer. - View Dependent Claims (15, 16, 17, 18)
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19. A non-volatile memory cell, comprising:
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a select gate over a first portion of a semiconductor substrate; a charge storage layer over a first semiconductor region, wherein the first semiconductor region is over a second portion of the semiconductor substrate; and a control gate over the charge storage layer, wherein the semiconductor substrate has a background doping of a first conductivity type, and a portion of the first semiconductor region has dopants of only a second conductivity type. - View Dependent Claims (20)
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Specification