Semiconductor structure with an electric field stop layer for improved edge termination capability
First Claim
1. An edge termination structure for a semiconductor device, comprising:
- a first layer on a semiconductor substrate;
a second layer connected to the first layer and including a plurality of sources, wherein a second dopant concentration of the second layer is higher than a first dopant concentration of the first layer; and
an electric field stop layer at a periphery of the semiconductor device having a third dopant concentration higher than the first dopant concentration of the first layer and approximately the same as the second dopant concentration of the second layer.
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Abstract
An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of the layer in which an edge termination is implemented, such as a drift layer or a channel layer. The electric field stop layer may be created by selectively masking the peripheries of the device during the device processing, i.e., mesa etch, to protect and preserve the highly doped material at the peripheries of the device.
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Citations
20 Claims
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1. An edge termination structure for a semiconductor device, comprising:
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a first layer on a semiconductor substrate; a second layer connected to the first layer and including a plurality of sources, wherein a second dopant concentration of the second layer is higher than a first dopant concentration of the first layer; and an electric field stop layer at a periphery of the semiconductor device having a third dopant concentration higher than the first dopant concentration of the first layer and approximately the same as the second dopant concentration of the second layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An edge termination structure for a semiconductor device, comprising:
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a semiconductor substrate; a drift layer located on the semiconductor substrate; a channel layer connected to the drift layer; a source layer connected to the channel layer and including a plurality of sources, wherein a dopant concentration of the source layer is higher than a dopant concentration of the drift layer and a dopant concentration of the channel layer; and an electric field stop layer at a periphery of the semiconductor device having a dopant concentration approximately the same as the dopant concentration of the source layer. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification