SEMICONDUCTOR DEVICE WITH CHANNEL STOP TRENCH AND METHOD

• US 20100078774A1
• Filed: 09/30/2008
• Published: 04/01/2010
• Est. Priority Date: 09/30/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Hirler, Franz
• Granted Patent: US 7,816,229 B2
• Time in Patent Office: Days
• US Class Current: 257/652
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device is provided which includes a semiconductor substrate having a first surface, an active area and a peripheral area. The semiconductor device further includes least one channel stop trench formed in the semiconductor substrate, wherein the channel stop trench extends from the first surface at least partially into the semiconductor substrate and is arranged between the active area and the peripheral area. At least one electrode is arranged in the channel stop trench. The semiconductor substrate includes at least a peripheral contact region, which is arranged in the peripheral area at the first surface of the semiconductor substrate. A conductive layer is provided and in electrical contact with the electrode arranged in the channel stop trench and in electrical contact with the peripheral contact region. The conductive layer is electrically connected to the semiconductor substrate merely in the peripheral area and electrically insulated from the semiconductor substrate in the active area.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate including a first surface, an active area and a peripheral area;

at least one channel stop trench formed in the semiconductor substrate, the channel stop trench extending from the first surface at least partially into the semiconductor substrate and being arranged between the active area and the peripheral area;

at least one electrode arranged in the channel stop trench;

a peripheral contact region of the semiconductor substrate arranged in the peripheral area at the first surface of the semiconductor substrate; and

a conductive layer formed in electrical contact with the electrode arranged in the channel stop trench and in electrical contact with the peripheral contact region, wherein the conductive layer is electrically connected to the semiconductor substrate in the peripheral area and electrically insulated from the semiconductor substrate in the active area.

2. The semiconductor device of claim 1, wherein the semiconductor substrate includes a drift region of a first conductivity type, and wherein the peripheral contact region is formed in the drift region.

3. The semiconductor device of claim 1, wherein the semiconductor substrate includes a drift region of a first conductivity type and a body region of a second conductivity type formed at least partially at the first surface, wherein the peripheral contact region is formed at least partially in the body region.

4. The semiconductor device of claim 3, wherein the semiconductor substrate further includes a substrate edge arranged on a side of the peripheral area opposite to the active area, wherein the body region extends at least partially to the substrate edge.

5. The semiconductor device of claim 1, wherein the channel stop trench includes an insulating layer arranged between the electrode arranged in the channel stop trench and the surrounding semiconductor substrate.

6. The semiconductor device of claim 1, wherein the channel stop trench surrounds, in a plan view on the first surface, the active area.

7. The semiconductor device of claim 1, wherein the active area includes at least a source region of a first conductivity type, a body region of a second conductivity type and a drift region of the first conductivity type, the body region being arranged between the source region and the drift region, the semiconductor device further including a first metallization which is in electrical contact at least with the source region and is electrically insulated from the peripheral area.

8. The semiconductor device of claim 7, wherein the active area further includes at least one gate trench formed in the semiconductor substrate, wherein the gate trench includes at least one gate electrode for generating an inversion channel in a channel region of the body region.

9. The semiconductor device of claim 1, further comprising at least one chipping stop trench formed in the semiconductor substrate, the chipping stop trench being arranged in the peripheral area between the channel stop trench and the peripheral contact region.

10. The semiconductor device of claim 9, wherein the chipping stop trench and the channel stop trench are connected to each other by at least one transverse trench.

11. The semiconductor device of claim 10, wherein the semiconductor substrate further includes a substrate edge arranged on a side of the peripheral area opposite to the active area, wherein the transverse trench extends to the substrate edge.

12. A semiconductor device, comprising:

a semiconductor substrate including a first surface, a substrate edge, an active area and a peripheral area, the peripheral area being arranged between the substrate edge and the active area;

at least one channel stop trench formed in the semiconductor substrate, the channel stop trench extending from the first surface at least partially into the semiconductor substrate and separating the active area from the peripheral area;

at least one electrode arranged in the channel stop trench and electrically insulated from the active area;

at least one peripheral contact region of the semiconductor substrate arranged in the peripheral area and assuming at least a portion of the first surface of the semiconductor substrate; and

a conductive layer formed at a portion of the first surface of the semiconductor substrate and providing an electrical connection between the electrode arranged in the channel stop trench and the peripheral contact region of the peripheral area of the semiconductor substrate, the conductive layer being electrically insulated from the active area.

13. The semiconductor device of claim 12, wherein the semiconductor substrate includes a drift region of a first conductivity type, wherein the peripheral contact region is formed in the drift region.

14. The semiconductor device of claim 12, wherein the semiconductor substrate includes a drift region of a first conductivity type and a body region of a second conductivity type formed at least partially at the first surface and extending from the active area at least partially to the substrate edge, wherein the peripheral contact region is formed in the body region.

15. The semiconductor device of claim 12, further comprising at least one chipping stop trench formed in the semiconductor substrate, the chipping stop trench being arranged in the peripheral area.

16. The semiconductor device of claim 15, wherein the chipping stop trench and the channel stop trench are connected to each other by at least one transverse trench which extends to the substrate edge.

17. A semiconductor device, comprising:

a semiconductor substrate including a first surface and a substrate edge;

at least one channel stop trench formed in the semiconductor substrate, the channel stop trench extending from the first surface at least partially into the semiconductor substrate and separating an active area of the semiconductor device from a peripheral area of the semiconductor device, the peripheral area being arranged between the channel stop trench and the substrate edge;

at least one electrode arranged in the channel stop trench and electrically insulated from the active area;

at least one chipping stop trench formed in the semiconductor substrate, the chipping stop trench being arranged in the peripheral area between the channel stop trench and the substrate edge; and

at least one transverse trench which connects the channel stop trench to the chipping stop trench and which extends to the substrate edge, the transverse trench providing an electrical connection between the electrode arranged in the channel stop trench and the semiconductor substrate in the peripheral area.

18. A method for manufacturing a semiconductor device, comprising:

providing a semiconductor substrate including a first surface;

forming at least one channel stop trench, which extends from the first surface into the semiconductor substrate, for separating an active area of the semiconductor device from a peripheral area of the semiconductor device;

forming at least one electrode in the channel stop trench, so that the electrode is electrically insulated from the active area;

forming at least a peripheral contact region of the semiconductor substrate in the peripheral area at the first surface of the semiconductor substrate; and

forming a conductive layer in electrical contact with the electrode arranged in the channel stop trench and in electrical contact with the peripheral contact region, such that the conductive layer is electrically connected to the semiconductor substrate merely in the peripheral area and electrically insulated from the semiconductor substrate in the active area.

19. The method of claim 18, wherein the semiconductor substrate further includes a drift region of a first conductivity type, the method further comprising:

forming the peripheral contact region in the drift region.

20. The method of claim 18, wherein the semiconductor substrate further includes a drift region of a first conductivity type, the method further comprising:

forming a body region of a second conductivity type in the semiconductor substrate adjacent to the drift region; and

forming the peripheral contact region in the body region.

21. The method of claim 20, further comprising:

forming a substrate edge region so that the peripheral area is arranged between the substrate edge region and the active area, wherein the body region is formed such that it extends at least partially to the substrate edge region.

22. The method of claim 21, further comprising:

cutting the semiconductor substrate along the substrate edge region.

23. The method of claim 18, further comprising:

forming at least one chipping stop trench in the semiconductor substrate in the peripheral area between the channel stop trench and the peripheral contact region.

24. A method for manufacturing a semiconductor device, comprising:

providing a semiconductor substrate including a first surface, an active area and a peripheral area;

defining a substrate edge region;

forming at least one channel stop trench, which extends from the first surface into the semiconductor substrate, for separating the active area of the semiconductor device from the peripheral area of the semiconductor device, wherein the peripheral area is arranged between the substrate edge region and the active region;

forming at least one electrode in the channel stop trench which is electrically insulated from the active area;

forming at least a peripheral contact region of the semiconductor substrate in the peripheral area at the first surface of the semiconductor substrate;

forming at least one chipping stop trench, which extends from the first surface into the semiconductor substrate, in the peripheral area between the channel stop trench and the substrate edge region;

forming a conductive layer at the first surface of the semiconductor substrate in electrical contact with the electrode arranged in the channel stop trench and in electrical contact with the peripheral contact region such that the conductive layer is electrically insulated from the semiconductor substrate in the active region; and

cutting the semiconductor substrate along the substrate edge region.

25. The method of claim 24, further comprising:

forming at least one transverse trench which connects the chipping stop trench with the channel stop trench and which extends to the substrate edge region of the semiconductor device.