METHODS AND APPARATUS FOR STORING ELECTRICITY

• US 20100079109A1
• Filed: 09/30/2009
• Published: 04/01/2010
• Est. Priority Date: 09/30/2008
• Status: Abandoned Application

• Current Assignee: Ioxus, Inc. (Systematic Power Solutions LLC)
• Original Assignee: Loxus Incorporated
• Inventors: Eilertsen, Thor E., Patsos, Daniel A.
• Application Number:
  US12/570,435
• Publication Number:
  US 20100079109A1
• Time in Patent Office: Days
• US Class Current: 320/127
• CPC Class Codes: H02J 3/32 using batteries with converting means
• CPC Class Codes: H02J 7/345 using capacitors as storage or buffering devices

Abstract

In some embodiments, a system includes a battery and a capacitor bank. The battery is electrically coupled to a load device and is configured to supply power to the load device when the system is in a first configuration. The system is in the first configuration when a current requirement of the load device is less than a current threshold. The capacitor bank includes a plurality of capacitors and is electrically coupled to the battery when the system is in a second configuration. The battery and the capacitor bank are configured to collectively provide power to the load device when the system is in the second configuration. The system is in the second configuration when the current requirement of the load device is greater than the current threshold.

Claims

1. A system, comprising:

a battery electrically coupled to a load device, the battery configured to supply power to the load device when the system is in a first configuration, the system being in the first configuration when a current requirement of the load device is less than a current threshold; and

a capacitor bank including a plurality of capacitors, the capacitor bank being electrically coupled to the battery when the system is in a second configuration, the battery and the capacitor bank being configured to collectively provide power to the load device when the system is in the second configuration, the system being in the second configuration when the current requirement of the load device is greater than the current threshold.

2. The system of claim 1, wherein the capacitor bank includes a plurality of capacitor rows coupled to each other in a parallel configuration, each capacitor row from the plurality of capacitor rows including a plurality of capacitors coupled to each other in a series configuration.

3. The system of claim 1, wherein the battery is configured to charge the plurality of capacitors when the system is in a third configuration, the system being in the third configuration when a voltage associated with the capacitor bank is less than a voltage associated with the battery.

4. The system of claim 1, wherein the capacitor bank is electrically isolated from the load device when the battery is electrically isolated from the load device.

5. The system of claim 1, wherein each capacitor from the plurality of capacitors is an EDLC.

6. The system of claim 1, wherein the battery is configured to charge the plurality of capacitors when the system is in a third configuration, the system being in the third configuration when a voltage associated with the capacitor bank is less than a voltage associated with the battery, a current supplied to the capacitor bank from the battery being less than a charging current threshold.

7. The system of claim 1, wherein the capacitor bank is electrically isolated from the load device when a voltage associated with the battery is greater than a voltage threshold.

8. The system of claim 1, wherein the capacitor bank is electrically isolated from the load device when a voltage associated with the battery is less than a voltage threshold.

9. The system of claim 1, wherein the battery is the sole source of power to the load device when the system is in the first configuration.

10. The system of claim 1, wherein the capacitor bank is electrically isolated from the load device when the system is in the first configuration.

11. A processor-readable medium storing code representing instructions configured to cause a processor to:

electrically isolate a capacitor bank of a system from a load device of the system when the system is in a first configuration, a battery of the system providing power to the load device when the system is in the first configuration, the system being in the first configuration when a current requirement of the load device is less than a current threshold;

electrically couple the capacitor bank of the system to the load device of the system when the system is in a second configuration, the battery of the system and the capacitor bank of the system collectively providing power to the load device when the system is in the second configuration, the system being in the second configuration when a current requirement of the load device is greater than a current threshold; and

electrically couple the capacitor bank with the battery such that the battery charges the capacitor bank when the system is in a third configuration, the system being in the third configuration when a voltage associated with the capacitor bank is less than a voltage associated with the battery.

12. The processor-readable medium of claim 11, wherein the capacitor bank includes a plurality of capacitor rows coupled to each other in a parallel configuration, each capacitor row from the plurality of capacitor rows including a plurality of capacitors coupled to each other in a series configuration.

13. The processor-readable medium of claim 11, the code further comprising code representing instructions to cause a processor to:

electrically isolate the capacitor bank from the load device when the battery is electrically isolated from the load device.

14. The processor-readable medium of claim 11, wherein each capacitor from the plurality of capacitors is an EDLC.

15. The processor-readable medium of claim 11, wherein, a current supplied to the capacitor bank from the battery when the system is in the third configuration is less than a charging current threshold of the battery.

16. The processor-readable medium of claim 11, the code further comprising code representing instructions to cause a processor to:

electrically isolate the capacitor bank from the load device when the voltage associated with the battery is greater than a voltage threshold.

17. The processor-readable medium of claim 11, the code further comprising code representing instructions to cause a processor to:

electrically isolate the capacitor bank from the load device when the voltage associated with the battery is less than a voltage threshold.

18. A method, comprising:

comparing a current at a load device with a current threshold;

electrically coupling a capacitor bank to the load device when the current at the load device is greater than the current threshold;

electrically isolating the capacitor bank from the load device when the current at the load device is less than the current threshold;

comparing a voltage of the capacitor bank with a voltage of a battery; and

electrically coupling the capacitor bank to the battery such that the battery charges the capacitor bank when the voltage of the capacitor bank is less than the voltage of the battery.

19. The method of claim 18, wherein the electrically coupling the capacitor bank to the load device includes sending a control signal operative to electrically couple the capacitor bank to the load device.

20. The method of claim 18, further comprising:

comparing the voltage of the battery with a threshold voltage; and

electrically isolating the capacitor bank from the load device when the voltage of the battery is greater than the threshold voltage.

21. The method of claim 18, further comprising:

comparing the voltage of the battery with a threshold voltage; and

electrically isolating the capacitor bank from the load device when the voltage of the battery is less than the threshold voltage.

22. The method of claim 18, further comprising:

electrically isolating the capacitor bank from the load device when the battery is electrically isolated from the load device.

23. The method of claim 18, further comprising:

limiting an amount of current supplied to the capacitor bank from the battery when the capacitor bank is electrically coupled to the battery.