Power savings technique for LCD using increased frame inversion rate

• US 20100079509A1
• Filed: 09/30/2008
• Published: 04/01/2010
• Est. Priority Date: 09/30/2008
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Gettemy, Shawn Robert, Yao, Wei H.
• Granted Patent: US 8,704,743 B2
• Time in Patent Office: Days
• US Class Current: 345/698
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general

Abstract

A method and system is disclosed for minimizing parasitic losses associated with a liquid crystal display (LCD) of a device. A frame buffer may be used in conjunction with a driver circuitry integrated circuit. The frame buffer may store a set of display values for the LCD so that the display values corresponding to a plurality of frames may be transmitted together from a processor in a burst. Once the values are transmitted, the processor may idle or hibernate. Alternatively, only the changes to an image may be transmitted from the processor to the driver circuitry. The remaining pixel values may be drawn based on values previously stored in the frame buffer. Furthermore, the driver circuitry may be used to step up the received display rate values to a level that allows for inversion of the polarity of pixels in the LCD using frame inversion.

Claims

1. A method of generating images, comprising:

initializing driver circuitry in a display to receive image data corresponding to voltages to be delivered to pixels in the display;

transmitting the image data at a first display rate in a burst from a processor in an electronic device in which the display is located, wherein the burst comprises transmitting multiple frames of voltages to be delivered to the pixels in the display;

receiving the image data at the driver circuitry;

storing the image data in a frame buffer located in the driver circuitry;

generating a first image for display on the display based on the image data, wherein generating a first image for display comprises refreshing the first image at a second display rate greater than the first display rate; and

displaying the first image on the display.

2. The method of claim 1, wherein initializing the driver circuitry comprises notifying the driver circuitry of the type of image data to be displayed on the display.

3. The method of claim 1, wherein the processor remains in an idle mode when not transmitting a burst to the display circuitry.

4. The method of claim 1, comprising transmitting an image data request from the display circuitry to the processor when the multiple frames of voltages to be delivered to the pixels in the display have been utilized to generate multiple images for display on the display.

5. The method of claim 4, comprising transmitting secondary image data at the first display rate in a burst from the processor in response to the image data request, wherein the secondary image data corresponds to a second set of multiple frames of voltages to be delivered to the pixels in the display.

6. The method of claim 1, comprising performing a frame inversion for the display once a frame at the second display rate.

7. The method of claim 6, wherein the first display rate is equal to 30 Hz and the second display rate is equal to either 90 Hz or 120 Hz.

8. A display comprising:

image generating circuitry adapted to generate a first image on the display;

a frame buffer located in the display and adapted to store voltage values corresponding to the first image to be generated on the display; and

driver circuitry located in the display and adapted to;

control the image generating circuitry and the frame buffer;

receive the voltage values corresponding to the first image to be generated on the display at a first frame rate and transmit the voltage values to the display at a second frame rate; and

perform a frame inversion for the display once a frame.

9. The display of claim 8, wherein the frame inversion comprises modulating a voltage transmitted to all pixels in the display.

10. The display of claim 8, wherein the driver circuitry is adapted to receive a second set of voltage values, wherein the second set of voltage values correspond to pixel voltage values to be changed from generation of the first image to generation of a second image.

11. The display of claim 10, wherein the driver circuitry is adapted to process the second set of voltage values with the first set of voltage values to produce a pixel voltage frame corresponding to pixel voltage values for each of a plurality of pixels in the display.

12. The display of claim 11, wherein image generating circuitry is adapted to generate the second image on the display based on the pixel voltage frame.

13. The display of claim 11, wherein the frame buffer is adapted to overwrite the first set of voltage values with the pixel voltage frame.

14. The display of claim 11, wherein processing the second set of voltage values with the first set of voltage values comprises overwriting the first set of voltage values with the second set of voltage values at any overlapping pixel locations.

15. The display of claim 8, wherein the frame buffer is adapted to store voltage values corresponding to a second image to be generated on the display concurrently with the voltage values corresponding to the first image.

16. The display of claim 15, wherein the voltage values corresponding to the first image and the voltage values corresponding to the second image are received by the display circuitry as part of the same transmission burst.

17. The display of claim 8, wherein the frame buffer comprises a static random access memory.

18. An electronic device, comprising:

a processor adapted to transmit image data at a first display rate in a burst, wherein the burst comprises transmitting multiple frames of voltages to be delivered to pixels in the display used to generate a plurality of images; and

a display, wherein the display comprises;

a frame buffer adapted to store voltage values corresponding to a plurality of images to be generated on the display; and

driver circuitry adapted to;

generate images for display on the display;

receive voltage values corresponding to the images to be generated on the display at the first frame rate and transmit the voltage values to the display at a second frame rate;

perform a frame inversion for the display once a frame; and

update the frame buffer with secondary voltage received via a second burst from the processor, wherein the secondary values correspond to a second plurality of images to be generated on the display.

20. The electronic device of claim 18, wherein the first display rate is equal to 30 Hz and the second display rate is equal to either 90 Hz or 120 Hz.

19. The electronic device of claim 19, wherein the driver circuitry is adapted to transmit an image data request to the processor when voltage values corresponding to a plurality of images to be generated on the display have been utilized to generate multiple images for display on the display.

21. A method of generating an image, comprising:

transmitting voltage values at a first display rate in a burst, wherein the voltage values correspond to multiple frames of voltages to be delivered to pixels in a display, and wherein the burst comprises transmitting the multiple frames of voltages as part of a single transmission;

storing the multiple frames of voltages in a frame buffer located on the display, wherein the frame buffer comprises a static random access memory;

generating a first image for display on the display at a second display rate based on a first frame of the multiple frames of voltages; and

displaying the first image on the display.

22. The method of claim 21, comprising performing a frame inversion for all the pixels in the display for every image displayed at the second display rate.

23. The method of claim 22, wherein performing the frame inversion comprises generating a modulated voltage and transmitting the modulated voltage to all pixels in the display.

24. The method of claim 21, comprising transmitting second voltage values corresponding to new pixel values for any pixels to be changed from the voltage values transmitted in the burst.

25. The method of claim 24, comprising overwriting the voltage values stored in the frame buffer with a combination of the stored voltage values and the second voltage values.