×

INTEGRATING NONVOLATILE MEMORY CAPABILITY WITHIN SRAM DEVICES

  • US 20100080042A1
  • Filed: 12/07/2009
  • Published: 04/01/2010
  • Est. Priority Date: 03/12/2007
  • Status: Active Grant
First Claim
Patent Images

1. A nonvolatile static random access memory (SRAM) device, comprising:

  • a pair of cross-coupled, complementary metal oxide semiconductor (CMOS) inverters configured as a storage cell for a bit of data;

    a pair of magnetic spin transfer devices coupled to opposing sides of the storage cell;

    wherein the magnetic spin transfer devices are configured to retain the storage cell data therein following removal of power to the SRAM device, and are further configured to initialize the storage cell with the retained data upon application of power to the SRAM device; and

    a first port and a second port each coupled to the SRAM cell, wherein;

    the first port comprises a first pair of pass gates and a first pair of bitlines, the first pair of bitlines configured for read and write operations of the SRAM cell during power on conditions; and

    the second port comprises a second pair of pass gates, a second pair of bitlines and the pair of spin transfer devices.

View all claims
  • 8 Assignments
Timeline View
Assignment View
    ×
    ×