Hybrid density memory system and control method thereof

• US 20100082883A1
• Filed: 02/26/2009
• Published: 04/01/2010
• Est. Priority Date: 10/01/2008
• Status: Abandoned Application

• Current Assignee: ADATA Technology Co., Ltd.
• Original Assignee: ADATA Technology Co., Ltd.
• Inventors: Hung, Shih-Fang, Fang, Tzu-Wei, Su, Tso-Cheng, Chen, Ming-Dar, Hsieh, Hsiang-An
• Application Number:
  US12/379,698
• Publication Number:
  US 20100082883A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels

Abstract

A control method of a memory system for accessing an updated data between a host and the memory system is provided. The host has storage space which is divided into a plurality of logical segments to access the data. The system includes a high density memory and a low density memory, and the high density memory includes a plurality of physical segments to access the data. The control method includes the following steps: first, providing a LDM table in the memory system to indicate the allocation information of the low density memory; finally, deciding where the data is written to is according to its properties and the LDM table.

Claims

1. A hybrid density memory system which is applicable to allow a host to access user data, in which the host has a storage space consisting of a plurality of logical units for accessing the user data, which hybrid density memory system comprising:

a storage module, which consists of a high density memory unit formed by high density memories and a low density memory unit formed by low density memories, wherein the high density memory unit is divided into a plurality of physical units as the storage space to facilitate one-to-one correspondence with such logical units, with each one of the physical units including a plurality of physical blocks; and

a control module, which is coupled between the host and the storage module, used to transfer user data to the high density memory unit or the low density memory unit based on the properties of the user data.

2. The hybrid density memory system according to claim 1, wherein the control module adjusts the correspondence between the addresses of the logical units and the physical units based on the number of erasures in the physical units.

3. The hybrid density memory system according to claim 1, wherein the logical unit is a logical segment, and the physical unit is a physical segment.

4. The hybrid density memory system according to claim 1, wherein the control module can define the start address and length of each of the physical units.

5. The hybrid density memory system according to claim 1, wherein each of the physical units has a Segment Table for indicating the allocation information of the physical block.

6. The hybrid density memory system according to claim 5, wherein the Segment Table has an update field for indicating the address in the low density memory unit for the user data access.

7. The hybrid density memory system according to claim 6, wherein the Segment Table has an allocated flag field indicating whether the physical block is allocated for accessing the user data, and has an alternate segment flag field indicating whether to adjust the physical address for accessing the user data, and has a PBA offset field indicating the physical block address for accessing the user data.

8. The hybrid density memory system according to claim 6, wherein the low density memory unit has a Low Density Memory table (LDM table) indicating the allocation information about the storage space of the low density memory unit, and the address of the low Density Memory table is recorded in the Segment Table.

9. The hybrid density memory system according to claim 1, wherein the storage module retains one of the physical blocks to store a boot file used to store the required information for controlling the startup of the memory system.

10. The hybrid density memory system according to claim 1, wherein the low density memory unit is Single-Level Cell (SLC) memory, Phase-Changed Memory (PCM), free Ferro-electronic Random Access Memory (FeRAM) or Magnetic Random Access Memory (MRAM);

the high density memory unit is Multi-Level Cell (MLC) memory.

11. A control method for the hybrid density memory system which is applicable for user data access between a host and the hybrid density memory system, wherein the host has a plurality of logical units as the storage space to access the user data, and the hybrid density memory system has a high density memory unit and a low density memory unit, which high density memory unit providing a plurality of physical units as the storage space to one-to-one correspond to the logical units, each of the physical units including a plurality of physical blocks, which control method comprising the following steps:

providing a Low Density Memory table (LDM table) in the hybrid density memory system to record the allocation information about the storage space of the low density memory unit; and

transferring the user data to the high density memory unit or the low density memory unit based on the properties of the user data and the contents of the LDM table.

12. The control method according to claim 11, wherein the operation modes of the host include a read mode and a write mode.

13. The control method according to claim 12, wherein the low density memory unit defines a plurality of continuous hot physical blocks, in which a range of valid physical blocks is defined from the included hot physical blocks by a head pointer register and a tail pointer register, which valid physical blocks storing at least one valid data, the address stored in the head pointer register pointing to the hot physical block most recently accessing the valid data, and the address stored in the tail pointer register pointing to the hot physical block most early accessing the valid data.

14. The control method according to claim 13, wherein the user data is sequentially allocated in such physical blocks or such hot physical blocks.

15. The control method according to claim 13, wherein each of the physical units consists of a segment table for recording the allocation condition of such physical blocks and recording the address of the LDM table.

16. The control method according to claim 15, wherein, when the operation mode of the host is the read mode, the step of accessing the user data based on the properties of the user data and the contents of the LDM table further includes the following steps:

determining whether the user data is stored in the low density memory unit;

determining, based on the above-said determination, whether to locate the physical block storing the user data from the segment table or to locate the hot physical block storing the user data from the LDM table; and

reading out the user data from the correct address, and combining the user data read from the low density memory and the rest of the user data read from the high density memory to send the result back to the host.

17. The control method according to claim 15, wherein the high density memory unit and low density memory unit record the valid data, the user data and the segment table in a fashion of storage space cyclic allocation.

18. The control method according to claim 17, wherein, when the operation mode of the host is the write mode, the step of accessing the user data based on the properties of the user data and the contents of the LDM table further includes the following steps:

comparing the data length of the user data with a threshold for differentiating the properties of the user data;

if the data length of the user data is smaller than the threshold, then executing the following steps;

causing the head pointer register to point to the next hot physical block from the current one;

allocating the user data to the hot physical block to which the head pointer register points;

determining whether the range of the valid physical blocks exceeds a recycling threshold; and

if the range of the valid physical blocks exceeds the recycling threshold, then executing a block recycling process; and

if the data length of the user data is greater than the threshold, then executing the following steps;

locating the physical block available for allocating the user data from the segment table; and

accessing the user data in the physical block.

19. The control method according to claim 16, further comprising the following step:

updating the LDM table and the segment table based on the adjusted information during the user data allocation process.

20. The control method according to claim 18, further comprising the following step:

updating the LDM table and the segment table based on the adjusted information during the user data allocation process.

21. The control method according to claim 18, wherein the block recycling process consists of the following steps:

determining whether the valid data stored in the hot physical block to which the tail pointer register points has been erased;

if the valid data stored in the hot physical block to which the tail pointer register points has been erased, then the tail pointer register points to the next hot physical block from the current one; and

if one of the valid data is stored in the hot physical block to which the tail pointer register points, then executing the following steps;

locating the physical block storing the valid data from the high density memory unit;

combining the valid data stored in the high density memory unit and in the low density memory unit to write into another physical block; and

erasing the physical block originally storing the valid data and erasing the hot physical block to which the tail pointer register points.

22. The control method according to claim 21, further comprising the following step:

updating the LDM table and the segment table based on the adjusted information during the block recycling process.

23. The control method according to claim 11, wherein the correspondence between the addresses of such logical units and such physical units is adjusted based on the number of erasures in such physical units.

24. The control method according to claim 11, wherein the LDM table is stored in the low density memory unit or in the control module.