DELEGATED VIRTUALIZATION IN A MULTI-CORE PROCESSOR (MCP)
First Claim
1. A multi-core processor, comprising:
- a main processing element comprising a set of virtualized control threads;
a first group of sub-processing elements associated with main processing element via at least one set of virtualized control threads; and
a group of sub-processing elements designated as a pseudo main processing element, the pseudo main processing element comprising a set of pseudo virtualized control threads.
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Accused Products
Abstract
The disclosure is applied to a generic microprocessor architecture with a set (e.g., one or more) of controlling elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs using program code embodied as a set of virtualized control threads. The arrangement also enables MPEs delegate functionality to one or more groups of SPEs such that those group(s) of SPEs will act as pseudo MPEs. The pseudo MPEs will utilize pseudo virtualized control threads to control the behavior of other groups of SPEs. In a typical embodiment, the apparatus includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements.
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Citations
20 Claims
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1. A multi-core processor, comprising:
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a main processing element comprising a set of virtualized control threads; a first group of sub-processing elements associated with main processing element via at least one set of virtualized control threads; and a group of sub-processing elements designated as a pseudo main processing element, the pseudo main processing element comprising a set of pseudo virtualized control threads. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A processing system, comprising:
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a main processing element; a first group of sub-processing elements; a virtualized control thread associating the main processing element with the first group of sub-processing elements, the set of virtualized control threads controlling the first group of sub-processing elements; a pseudo main processing element; a second group of sub-processing elements; and a pseudo virtualized control thread associating the pseudo main processing element with the second group of sub-processing elements, the set of virtualized control threads controlling the group of sub-processing elements. - View Dependent Claims (10, 11, 13)
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12. The processing system of claim 12, the virtualized control thread and the pseudo virtualized control thread being further configured to collect computation results from the first group of sub-processing elements and the second group of sub-processing elements.
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14. A processing method, comprising:
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associating a main processing element with a first group of sub-processing element using a set of virtualized control threads; delegating a set of functions of the main processing element to a second group of sub-processing elements to cause the second group of sub-processing elements to act as a pseudo main processing element; associating the pseudo main processing element with a third group of sub-processing elements using a set of pseudo virtualized control threads; and controlling the first group of sub-processing elements using the set of virtualized control threads and the third group of sub-processing elements using the set of pseudo virtualized control threads. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A method for deploying a processing system, comprising:
providing a multi-core processor comprising; a main processing element comprising a set of virtualized control threads; a first group of sub-processing elements associated with main processing element via at least one of set of virtualized control threads; and a group of sub-processing elements designated as a pseudo main processing element, the pseudo main element comprising a set of pseudo virtualized control threads.
Specification