Operation method of non-volatile memory

• US 20100085821A1
• Filed: 06/11/2009
• Published: 04/08/2010
• Est. Priority Date: 10/06/2008
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Myoungjae, Park, Jaechul, Park, Youngsoo, Ahn, Seungeon, Kwon, Keewon
• Granted Patent: US 8,234,438 B2
• Time in Patent Office: Days
• US Class Current: 365/189.160
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 8/06 Address interface arrangements, e.g. address buffers

Abstract

Example embodiments provide a method of operating a non-volatile memory in which the non-volatile memory may only be changed from a first state to a second state and may not be changed from the second state to the first state during a programming operation.

Claims

1. A method of operating a non-volatile memory, the method comprising:

writing a first logical address and a first physical address in a first row of a look-up table and programming first data to a data storage space indicated by the first physical address,

wherein the look-up table includes a plurality of rows, each row having a tag, a logical address and a physical address; and

writing the first logical address and a second physical address in a second row of the look-up table and programming the second data to a data storage space indicated by the second physical address,

wherein writing the first logical address and second physical address and programming the second data is performed when an instruction requiring the first data be changed to second data is received,

wherein the non-volatile memory includes a first state and a second state,

wherein values of bits within the look-up table and the data storage space change from a first value to a second value during writing the first logical address and first physical address and programming the first data and during writing the first logical address and second physical address and programming the second data, and

wherein the first value corresponds to the first state of the non-volatile memory and the second value corresponds to the second state of the non-volatile memory.

2. The method of claim 1, wherein values of the bits constituting the look-up table and the data storage space do not change from the second value to the first value.

3. The method of claim 1, wherein the non-volatile memory has a lower resistance in the first state and a higher resistance in the second state.

4. The method of claim 1, wherein a first voltage pulse signal allowing the non-volatile memory to be in the first state has a first voltage and a first amplitude and a second pulse signal allowing the non-volatile memory to be in the second state has a second voltage and a second amplitude,

wherein the first voltage is less than the second voltage, and

wherein the first amplitude is greater than the second amplitude.

5. The method of claim 1, wherein the second physical address follows the first physical address.

6. The method of claim 1, further including changing a tag of the first row of the look-up table from the first value to the second value prior to programming the second data.

7. The method of claim 6, further including

searching the look-up table for a row comprising a tag which includes the first logical address and has the first value when an instruction is received requiring data indicated by the first logical address be read, and

reading data indicated by the second physical address included in the row.

8. The method of claim 1, further including

a refresh operation of changing values of all bits constituting the look-up table and the data storage space from the second value to the first value after writing the first logical address and second physical address and programming the second data.

9. The method of claim 8, wherein the non-volatile memory is changed from the second state to the first state by one of an electrical signal, heat, and an electromagnetic wave.

10. The method of claim 8, further including

programming in descending physical address order after the refresh operation is performed, if prior to the refresh operation programming was performed in ascending physical address order, and

programming in ascending physical address order after the refresh operation is performed, if prior to the refresh operation programming was performed in descending physical order.

11. The method of claim 8, wherein programming after the refresh operation is performed on a physical address following the second physical address.

12. The method of claim 1, further including

programming third data in a data storage space indicated by a third physical address mapped to the second logical address,

wherein programming the third data is performed after programming the first data, and

wherein programming the second data is performed before or after programming the third data.

13. The method of claim 12, wherein the third physical address follows the last physical address programmed in the data storage space.

14. The method of claim 1, wherein the bits constituting the look-up table and the data storage space are embodied as one of a resistive random access memory, a phase-change random access memory, and a magneto-resistive random access memory.

15. A method of operating a non-volatile memory, the method comprising:

writing a first physical address in a pointer of a first row of a look-up table and programming first data into a data storage space indicated by the first physical address,

wherein the look-up table includes a plurality of rows, each row having a pointer; and

writing a second physical address in a pointer of the first row of a look-up table and programming second data into a data storage space indicated by the second physical address,

wherein writing the second physical address and programming the second data are performed when an instruction requiring the first data be changed to second data is received,

wherein the non-volatile memory includes a first state and a second state,

wherein values of bits within the look-up table and the data storage space change from a first value to a second value during writing the first physical address and programming the first data and during writing the second physical address and programming the second data,

Wherein the first value corresponds to the first state and the second value corresponds to the second state.

16. The method of claim 15, wherein the values of the bits constituting the look-up table and the data storage space do not change from the second value to the first value.

17. The method of claim 15, wherein each row of the look-up table includes a plurality of pointers and the second physical address is stored in a pointer of the first row which is different than the pointer of the first row storing the first physical address.

18. The method of claim 15, wherein the bits constituting the look-up table and the data storage space are embodied as one of a resistive random access memory, a phase-change random access memory, and a magneto-resistive random access memory.

19. A method of operating a non-volatile memory, the method comprising:

writing a logical address and a physical address in a row of a look-up table and programming first data to a storage space indicated by the physical address by changing values of bits within the look-up table and the data storage space from a first value to a second value,

wherein the look-up table includes a plurality of rows, each row having a tag, a logical address and a physical address; and

performing a refreshing operation by changing values of all bits within the look-up table and the data storage space from the second value to the first value.

20. The method of claim 19, wherein the refreshing operation is only performed when an instruction requiring performance of the refreshing operation is received.