METHOD OF PRODUCING A PHOTOVOLTAIC CELL WITH A HETEROJUNCTION ON THE REAR FACE

• US 20100087031A1
• Filed: 09/21/2007
• Published: 04/08/2010
• Est. Priority Date: 09/26/2006
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: Veschetti, Yannick, Remiat, Bruno
• Granted Patent: US 7,972,894 B2
• Time in Patent Office: Days
• US Class Current: 438/72
• CPC Class Codes: H01L 31/022441 Electrode arrangements specially adapted for back-contact solar cells
• CPC Class Codes: H01L 31/0745 comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
• CPC Class Codes: H01L 31/0747 comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
• CPC Class Codes: H01L 31/202 including only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to a method of producing a photovoltaic cell (100), comprising at least the steps of:

• • a) deposition of a passivation layer (12) based on an intrinsic amorphous semiconductor on a back surface of a substrate (2) based on a crystalline semiconductor,
  • b) screen-printing of a first sacrificial mask comprising at least one through-opening on the passivation layer, at a temperature less than or equal to 250° C.,
  • c) deposition of a doped amorphous semiconductor layer (20) of a first type of conductivity at least in the opening,
  • d) removal of the first sacrificial mask, leaving at least one doped amorphous semiconductor pad (20) of the first type of conductivity remaining at the opening of the first sacrificial mask.

Claims

1-15. -15. (canceled)

16. A method of producing a photovoltaic cell, comprising:

a) depositing a passivation layer based on at least one intrinsic amorphous semiconductor on a back surface of a substrate based on at least one crystalline semiconductor;

b) screen-printing a first sacrificial mask comprising at least one through-opening on the passivation layer;

c) depositing a doped amorphous semiconductor layer of a first type of conductivity at least in the opening; and

d) removing the first sacrificial mask, leaving at least one doped amorphous semiconductor pad of the first type of conductivity remaining at the opening of the first sacrificial mask;

operations a)-d) being carried out at temperatures less than or equal to approximately 250°

C.

17. A method according to claim 16, wherein the operations a), b), c) and d) are carried out at temperatures less than or equal to approximately 200°

C.

18. A method according to claim 16, further comprising, prior to the a) depositing the passivation layer, depositing a layer based on at least one amorphous semiconductor onto a front surface of the substrate, which is opposite the back surface of the substrate.

19. A method according to claim 18, further comprising, after the depositing the amorphous semiconductor-based layer onto the front surface of the substrate, depositing an anti-reflective layer onto the amorphous semiconductor-based layer.

20. A method according to claim 16, the b) screen-printing a first sacrificial mask comprising:

depositing a first sacrificial layer based on silicon oxide, and/or silicon carbide, and/or silicon nitride onto the passivation layer;

depositing via screen printing a first etching mask in a pattern similar to the pattern of the first sacrificial mask;

removing via etching the portions of the first sacrificial layer not covered by the first etching mask, the remaining portions of the first sacrificial layer thus forming the first sacrificial mask; and

removing the first etching mask.

21. A method according to claim 16, the b) screen-printing the first sacrificial mask comprising:

depositing a first sacrificial layer based on silicon oxide, and/or silicon carbide, and/or silicon nitride onto the passivation layer;

depositing via screen printing an etching paste, in a reverse pattern of the pattern of the first sacrificial mask, thereby forming the first sacrificial mask in the first sacrificial layer.

22. A method according to claim 16, the b) screen-printing the first sacrificial mask comprising depositing via screen printing a paste based on a polymer and/or an oxide, thereby forming the first sacrificial mask.

23. A method according to claim 16, further comprising, after the d) removing:

e) screen-printing a second sacrificial mask, the second sacrificial mask overlapping at least the doped amorphous semiconductor of the first type of conductivity;

f) depositing a doped amorphous semiconductor layer of a second type of conductivity, which is opposite the first type of conductivity, into at least one pattern formed by the second sacrificial mask; and

g) removing the second sacrificial mask, leaving at least one doped amorphous semiconductor pad of the second type of conductivity remaining at the level of the second sacrificial mask pattern.

24. A method according to claim 23, the e) screen-printing the second sacrificial mask comprising:

depositing a second sacrificial layer based on silicon oxide, and/or silicon carbide, and/or silicon nitride onto the passivation layer;

depositing via screen printing a second etching mask in a pattern similar to the pattern of the second sacrificial mask;

removing via etching the portions of the second sacrificial layer not covered by the second etching mask, the remaining portions of the second sacrificial layer thus forming the second sacrificial mask; and

removing the second etching mask.

25. A method according to claim 23, the e) screen-printing the second sacrificial mask comprising:

depositing a second sacrificial layer based on silicon oxide, and/or silicon carbide, and/or silicon nitride onto the passivation layer;

depositing via screen printing an etching paste, in a reverse pattern of the pattern of the second sacrificial mask, thereby forming the second sacrificial mask in the second sacrificial layer.

26. A method according to claim 23, the e) screen-printing producing the second sacrificial mask comprising depositing, via screen printing, a polymer and/or oxide paste, thus forming the second sacrificial mask.

27. A method according to claim 23, further comprising, prior to the g) removing the second sacrificial mask, depositing metallizations.

28. A method according to claim 23, further comprising, after the g) removing the second sacrificial mask, depositing metallizations onto the doped amorphous semiconductor of the first type of conductivity and onto the doped amorphous semiconductor of the second type of conductivity via evaporation and/or spraying through a metallic mask.

29. A method according to claim 16, further comprising, prior to the d) removing the first sacrificial mask, depositing metallizations.

30. A method according to claim 27, further comprising, prior to the depositing metallizations, spray-depositing a conductive transparent oxide onto the doped amorphous semiconductor, the metallizations next being deposited onto the conductive transparent oxide.