PHOTOELECTROCHEMICAL ETCHING FOR CHIP SHAPING OF LIGHT EMITTING DIODES

• US 20100090240A1
• Filed: 10/09/2009
• Published: 04/15/2010
• Est. Priority Date: 10/09/2008
• Status: Active Grant

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Hu, Evelyn L., Speck, James S., Tamboli, Adele
• Granted Patent: US 8,569,085 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate

Abstract

A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an angle of the resulting sidewalls of the III-V semiconductor material. The sidewalls may be sloped as well as vertical, in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material. In addition to shaping the chip in order to extract light emitted into guided modes, the chip may be shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.

Claims

1. A method for fabricating a semiconductor device, comprising:

performing a photoelectrochemical (PEC) etch for chip shaping of a device comprised of a III-V semiconductor material in order to extract light emitted into guided modes trapped in the III-V semiconductor material.

2. The method of claim 1, wherein the chip shaping comprises varying an angle of incident light during the PEC etch to control one or more angles of one or more resulting surfaces of the III-V semiconductor material.

3. The method of claim 2, wherein each of the surfaces is a sidewall at the angles such that the sidewall totally internally reflects more of the guided modes on a first pass towards a top surface of the device, wherein more of the totally internally reflected guided modes are incident at the top surface within the critical angle for extraction.

4. The method of claim 3, wherein each of the surfaces is a sidewall and the chip shaping further comprises varying the angle of the incident light to control a smoothness and surface roughness of the sidewall.

5. The method of claim 4, wherein the surface roughness of the sidewall is sufficiently smaller than a wavelength of the light emitted into the guided modes to prevent scattering of the guided modes'"'"' light by the surface roughness, so that the sidewall'"'"'s surface is specular for the wavelength.

6. The method of claim 4, wherein the angles and the surface roughness are not substantially determined by a crystallography of the III-V semiconductor material.

7. The method of claim 2, wherein the surfaces are sidewalls and the angles of the sidewalls are such that the sidewalls of the III-V semiconductor material are sloped in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material.

8. The method of claim 2, wherein the surfaces comprise one or more curved surfaces and the chip shaping further comprises varying the angle or intensity profile of the incident light to fabricate the curved surfaces.

9. The method of claim 2, further comprising:

obtaining the III-V semiconductor material comprising an n-type layer, a p-type layer, and an active region grown on a template or substrate, wherein the active region, for generating and emitting the light into the guided modes, is in between the p-type layer and the n-type layer and the III-V semiconductor material is a III-Nitride semiconductor material; and

performing the PEC etch step to form the at least one resulting surface of the III-Nitride semiconductor material.

10. The method of claim 9, wherein the angle of the incident light shapes and positions the curved surface to define a lens that focuses or directs the light emitted by the active region, and the lens comprises III-Nitride semiconductor material.

11. The method of claim 10, wherein the lens is a layer grown and shaped on top of the active layer, or shaped in the substrate or template.

12. The method of claim 9, wherein an orientation of the III-Nitride material and a light emitting surface of the active region are an m-plane or a-plane.

13. The method of claim 1, wherein the device is shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.

14. The method of claim 1, wherein the PEC etch is performed to dice a wafer comprising a plurality of the devices into distinct chips.

15. A light emitting diode (LED), comprising:

III-Nitride semiconductor material including an active region for generating and emitting light;

wherein the III-Nitride semiconductor material includes one or more etched surfaces that have a surface smoothness;

wherein the etched surfaces have an inclination at one or more sloped angles relative to a light emitting surface of the active region; and

wherein the surface smoothness and the inclination of the etched surfaces enhance extraction of the light emitted into guided modes trapped in the III-Nitride semiconductor material.

16. The LED of claim 15, wherein the sloped angles are such that the surface totally internally reflects more of the guided modes on a first pass towards a top surface of the LED, and more of the totally internally reflected guided modes are incident at the top surface within the critical angle for extraction.

17. The LED of claim 15, wherein the III-Nitride semiconductor material includes a template or substrate, an n-type layer, a p-type layer, the active region in between the p-type layer and the n-type layer, such that the n-type layer, p-type layer and the active layer are grown on the template or substrate.

18. The LED of claim 15, wherein the etched surfaces are one or more sidewalls having a surface roughness sufficiently smaller than a wavelength of the light emitted by the active region, such that the light is not scattered by the surface roughness and the sidewall'"'"'s surface is specular for the light'"'"'s wavelength.

19. The LED of claim 15, wherein the etched surfaces are sloped in order to scatter the guided modes out of the III-Nitride semiconductor material rather than reflecting the guided modes back into the III-Nitride semiconductor material.

20. The LED of claim 15, wherein the etched surfaces comprise one or more curved surfaces.

21. The LED of claim 20, wherein the curved surfaces are shaped and positioned to define a lens that focuses or directs the light emitted by the active region, and the lens is comprised of the III-Nitride semiconductor material.

22. The LED of claim 21, wherein the lens is a layer grown and shaped on top of the active layer, or shaped in the substrate or template.

23. The LED of claim 15, wherein a top surface the III-Nitride semiconductor material and the light emitting surface is an m-plane or a-plane.

24. The LED of claim 15, wherein the angles and the surface smoothness are not substantially determined by a crystallography of the III-Nitride semiconductor material.

25. The LED of claim 15, wherein the LED is a distinct chip diced from a wafer by photoelectrochemical (PEC) etching.

26. A method for wafer dicing, comprising using photoelectrochemical (PEC) etching to dice a wafer into distinct device chips.

27. An apparatus for fabricating a semiconductor device, comprising:

an electrochemical cell for chemically etching a III-V semiconductor material during a photoelectrochemical (PEC) etch;

a light source for emitting incident light onto the III-V semiconductor material; and

means for re-positioning the incident light relative to the III-V semiconductor material in the electrochemical cell, wherein the means for re-positioning varies an angle of the incident light during the PEC etch to control an angle of resulting sidewalls of the III-V semiconductor material, thereby chip shaping the device comprised of the III-V semiconductor material in order to extract light emitted into guided modes trapped in the III-V semiconductor material.

28. The apparatus of claim 27, wherein the chip is shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.

29. The apparatus of claim 27, wherein the PEC etch is performed to dice wafers into distinct chips.