Power semiconductor module with a hermetically tight circuit arrangement and method for producing such a module

• US 20100090328A1
• Filed: 04/06/2009
• Published: 04/15/2010
• Est. Priority Date: 04/05/2008
• Status: Active Grant

• Current Assignee: Semikron Elektronik GmbH & Company KG (Heilbronner Holding GbR)
• Original Assignee: Semikron Elektronik GmbH & Company KG (Heilbronner Holding GbR)
• Inventors: Goebl, Christian, Braml, Heiko
• Granted Patent: US 8,324,717 B2
• Time in Patent Office: Days
• US Class Current: 257/687
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/371 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/37147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/40225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/8384 Sintering
• CPC Class Codes: H01L 2224/8484 Sintering
• CPC Class Codes: H01L 23/051 another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
• CPC Class Codes: H01L 23/296 Organo-silicon compounds
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 24/01 Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/33 of a plurality of layer connectors
• CPC Class Codes: H01L 24/37 of an individual strap connector
• CPC Class Codes: H01L 24/38 of a plurality of strap connectors
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/41 : of a plurality of strap connectors
• CPC Class Codes: H01L 24/50 : Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto thin flexible metallic tape with or without a film carrier H01L23/49572, flexible insulating substrates H01L23/4985, H01L23/5387
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/86 : using tape automated bonding [TAB]
• CPC Class Codes: H01L 25/072 : the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A power semiconductor module comprising a substrate, a circuit formed thereon and having a plurality of conductor tracks that are electrically insulated from one another and power semiconductor components arranged on the conductor tracks. The latter are connected in a circuit-conforming manner by a connection device, which has an alternating layer sequence of at least two electrically conductive layers with at least one electrically insulating layer between them. In this case, the substrate has a first sealing area, which uninterruptedly encloses the circuit. Furthermore, this sealing area is connected to an assigned second sealing area on a layer of the connection device by a connection layer. According to the invention, this power semiconductor module is produced by applying pressure to the substrate, to the power semiconductor components and to the connection device.

Claims

1. A power semiconductor module comprising:

a substrate;

a circuit formed on said substrate and including a plurality of conductor tracks that are electrically insulated from one another and power semiconductor components arranged on said conductor tracks;

a connection device to connect, in a circuit-conforming manner, said components and said tracks;

at least two electrically conductive layers; and

at least one electrically insulating layer disposed between said two electrically conductive layers;

wherein said substrate has a first sealing area, which uninterruptedly encloses said circuit and a connection layer that connects said sealing area to an assigned second sealing area on a layer of said connection device.

2. The power semiconductor module of claim 1, wherein said first sealing area is arranged on a metallic layer and is hermetically tightly connected to at least one of said electrically conductive layers of said connection device by a pressure sintering connection and wherein said connection layer comprises a sintering metal.

3. The power semiconductor module of claim 1, wherein said first sealing area is formed on at least one of a metallic layer and an insulating area of said substrate and is hermetically tightly connected to said second sealing area by a pressure sintering connection and wherein said connection layer is a prepreg.

4. The power semiconductor module of claim 1, wherein said second sealing area is formed on one of a conductive layer and an insulating layer of the connection device.

5. The power semiconductor module of claim 1, further comprising:

a gel-like insulant arranged circumferentially around said power semiconductor components.

6. A method for producing a power semiconductor module,

wherein said power semiconductor module includes;

a substrate having at least one conductor track thereon;

a connection device for connecting said tracks to at least one power semiconductor component;

a first sealing area that uninterruptedly encloses said tracks and said components;

a connection layer that connects said first sealing area to an assigned second sealing area on a layer of said connection device;

wherein the method comprises the steps of;

connecting at least one of said power semiconductor components to an assigned conductor track;

arranging said connection layer on said first sealing area;

arranging said connection device with respect to said power semiconductor components said first sealing area and said conductor tracks; and

applying pressure to said substrate, said power semiconductor components and said connection device.

7. The method of claim 6, further comprising the step of:

arranging after the arrangement of said power semiconductor components, a gel-like insulant around said power semiconductor component, so as to cover an edge of a main area thereof, said main area being remote from said substrate.

8. The method of claim 6, wherein said connection of said at least one power semiconductor component to its assigned conductor track and connection thereof to a metallic layer of the connection device is performed by sintering.

9. The method of claim 6, wherein said connection layer is a sintering metal layer and said connection thereof to said first sealing area comprised of a metal, and said assigned second sealing area is formed at the same time as a sintering connection of the at least one power semiconductor component to said conductor track and said connection layer.

10. The method of claim 6, wherein said connection layer is a prepreg and said connection thereof to said first sealing area and said assigned second sealing area of said connection device is formed at the same time as a sintering connection of said at least one power semiconductor component to said conductor tracks and said connection layer.