Electrostatic Discharge (ESD) Shielding For Stacked ICs

• US 20100091475A1
• Filed: 10/15/2008
• Published: 04/15/2010
• Est. Priority Date: 10/15/2008
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Gu, Shiqun, Jalilizeinali, Reza, Toms, Thomas R.
• Application Number:
  US12/251,802
• Publication Number:
  US 20100091475A1
• Time in Patent Office: Days
• US Class Current: 361/816
• CPC Class Codes: H01L 2224/274 by blanket deposition of the material of the layer connector
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/01055 Cesium [Cs]
• CPC Class Codes: H01L 2924/12044 OLED

Abstract

An unassembled stacked IC device includes an unassembled tier. The unassembled stacked IC device also includes a first unpatterned layer on the unassembled tier. The first unpatterned layer protects the unassembled tier from ESD events.

Claims

1. An unassembled stacked IC device, comprising:

an unassembled tier; and

a first unpatterned layer on the unassembled tier, the first unpatterned layer protecting the unassembled tier from ESD events.

2. The unassembled stacked IC device of claim 1, in which the first unpatterned layer thickness is between 100 and 50000 Angstroms.

3. The unassembled stacked IC device of claim 1, in which the first unpatterned layer is a metal layer.

4. The unassembled stacked IC device of claim 3, further comprising a second unpatterned layer on the first unpatterned layer to prevent oxidation of the first unpatterned layer.

5. The unassembled stacked IC device of claim 3, in which the first unpatterned layer may be later patterned into tier-to-tier connections.

6. The unassembled stacked IC device of claim 1, in which the first unpatterned layer is a semiconductor layer.

7. The unassembled stacked IC device of claim 6, in which the first unpatterned layer may be later patterned into tier-to-tier connections.

8. The unassembled stacked IC device of claim 1, in which the first unpatterned layer is an insulator layer.

9. The unassembled stacked IC device of claim 8, in which the first unpatterned layer may be later patterned to expose tier-to-tier connections.

10. The unassembled stacked IC device of claim 8, in which the first unpatterned layer may be later removed to expose tier-to-tier connections.

11. A method for manufacturing a stacked IC device, comprising:

manufacturing a tier of the stacked IC device; and

depositing an unpatterned layer on the tier before transporting to an assembly plant, the unpatterned layer protecting the tier from ESD events.

12. The method of claim 11, in which depositing the unpatterned layer comprises depositing an insulating layer.

13. The method of claim 11, in which depositing the unpatterned layer comprises depositing one of silicon dioxide, silicon nitride, or polymer.

14. The method of claim 11, in which depositing the unpatterned layer comprises depositing a conducting layer.

15. The method of claim 11, in which depositing the unpatterned layer comprises depositing a semiconducting layer.

16. A method for manufacturing a stacked IC device, comprising:

altering an unpatterned layer protecting a tier of a stacked IC device from ESD events to allow the tier of the stacked IC device to be integrated into the stacked IC device; and

integrating the tier into the stacked IC device.

17. The method of claim 16, in which altering the unpatterned layer comprises patterning an insulator layer.

18. The method of claim 17, in which altering the unpatterned layer comprises removing the unpatterned layer to expose tier-to-tier connections of the stacked IC device.

19. The method of claim 17, in which altering the unpatterned layer comprises patterning the unpatterned layer to expose tier-to-tier connections of the stacked IC device.

20. The method of claim 16, in which altering the unpatterned layer comprises patterning a semiconductor layer.

21. The method of claim 20, in which altering the unpatterned layer comprises patterning the unpatterned layer to create tier-to-tier connections.

22. The method of claim 16, in which altering the unpatterned layer comprises patterning a conductor layer.

23. The method of claim 22, in which altering the unpatterned layer comprises patterning the unpatterned layer to create tier-to-tier connections.

24. An unassembled stacked IC device, comprising means for shielding the unassembled stacked IC device from ESD events prior to assembling the stacked IC device.

25. The unassembled stacked IC device of claim 24, in which, after assembling the stacked IC device, the means for shielding is configured into means for connecting a first tier to a second tier.