IMAGE SENSOR AND METHOD

• US 20100094579A1
• Filed: 10/14/2008
• Published: 04/15/2010
• Est. Priority Date: 10/14/2008
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: ON Semiconductor Trading, Ltd (ON Semiconductor Corporation)
• Inventors: Scheffer, Danny
• Granted Patent: US 7,974,805 B2
• Time in Patent Office: Days
• US Class Current: 702/85
• CPC Class Codes: H04N 25/68 applied to defects
• CPC Class Codes: H04N 5/32 Transforming X-rays cameras or camera modules for generating image signals from X-rays H04N23/30; circuitry of SSIS for transforming X-rays into image signals H04N25/30

Abstract

Described herein are methods that may improve yield of an image sensor. In one embodiment, a method that may improve yield of an image sensor includes generating output values of control logic associated with an array of light sensitive elements. The method further may include determining if the control logic has one or more faulty output values. The method further may include automatically correcting the one or more faulty output values. In another embodiment, a method that may improve yield of an image sensor includes providing light to an array of light sensitive elements. The method further may include generating an image based on the light sensitive elements and associated control logic. The method further may include disconnecting control lines from control logic that has one or more faulty output values based on viewing the image. The method further may include generating another image based on the control logic having no faulty output values.

Claims

1. A method comprising:

generating output values of control logic associated with an array of light sensitive elements in response to input data;

determining if the control logic has one or more faulty output values; and

automatically correcting the one or more faulty output values.

2. The method of claim 1, further comprising:

providing light to the array of light sensitive elements.

3. The method of claim 1, wherein the control logic is coupled to a majority voting circuit.

4. The method of claim 3, wherein the majority voting circuit determines if the control logic has one or more faulty output values by comparing each output value to one or more neighbor output values.

5. The method of claim 4, wherein the majority voting circuit determines if the control logic has one or more faulty output values by comparing each output value to one or more neighbor output values.

6. The method of claim 5, wherein the majority voting circuit determines if the control logic has one or more faulty output values by comparing an output value i to output values i+1 and i−

1 with i being an integer number.

7. The method of claim 2, further comprising:

automatically generating an image based on the control logic having no faulty output values.

8. An image sensor, comprising:

an array of light sensitive elements;

control logic coupled to the array of elements, the control logic to generate output values in response to input data;

a fault detection circuit coupled to the control logic to automatically determine if the control logic has one or more faulty output values, the fault detection circuit to automatically correct the one or more faulty output values and to generate corrected output values.

9. The image sensor of claim 8, further comprising:

control lines to receive the corrected output values from the fault detection circuit.

10. The image sensor of claim 9, wherein the corrected output values are used to select the light sensitive elements.

11. The image sensor of claim 8, wherein the control logic comprises at least one of shift registers, flip-flops, and address decoders.

12. The image sensor of claim 8, wherein the fault detection circuit determines if the control logic has one or more faulty output values by comparing each output value to one or more neighbor output values.

13. The image sensor of claim 8, wherein the fault detection circuit comprises a majority voting circuit.

14. The image sensor of claim 13, wherein the majority voting circuit determines if the control logic has one or more faulty output values by comparing an output value i received from control logic i to output values i+1 and i−

1 received from control logic i+1 and i−

1, respectively, with i being an integer number.

15. The image sensor of claim 8, wherein the light sensitive elements are passive or active pixels sensors.

16. The image sensor of claim 8, wherein the control logic is embedded in the array of light sensitive elements in a stitched pattern.

17. The image sensor of claim 8, further comprising:

read out circuitry coupled to the array of light sensitive elements, the read out circuitry to read out pixel values for the image sensor.

18. An apparatus comprising:

means for generating output values of control logic associated with an array of light sensitive elements; and

means for automatically correcting one or more faulty output values.

19. The apparatus of claim 18, further comprising:

means for providing light to the array of light sensitive elements;

means for automatically generating an image based on the control logic having no faulty output values.

20. The apparatus of claim 18, further comprising a fault detection circuit to determine if the control logic has one or more faulty output values by comparing each output value to one or more neighbor output values.