BOOT ALGORITHM
First Claim
1. A method of booting a processor of an integrated circuit chip, the method comprising:
- retrieving primary boot code from an on-chip primary boot source on the same chip as said processor, the primary boot code comprising at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip;
executing the primary boot code on said processor, including the boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source;
retrieving the secondary boot code from the determined location; and
continuing the booting of the processor by executing said secondary boot code on the processor.
2 Assignments
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Accused Products
Abstract
A method, chip and computer program product for booting from a secondary boot source. In one embodiment, the method includes: (1) retrieving primary boot code from an on-chip primary boot source on the same chip as a processor, the primary boot code comprising at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip, (2) executing the primary boot code on the processor, including the boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source, (3) retrieving the secondary boot code from the determined location and (4) continuing the booting of the processor by executing the secondary boot code on the processor.
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Citations
22 Claims
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1. A method of booting a processor of an integrated circuit chip, the method comprising:
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retrieving primary boot code from an on-chip primary boot source on the same chip as said processor, the primary boot code comprising at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip; executing the primary boot code on said processor, including the boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source; retrieving the secondary boot code from the determined location; and continuing the booting of the processor by executing said secondary boot code on the processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An integrated circuit chip comprising:
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an on-chip storage means being a primary boot source storing primary boot code; a plurality of input locations each being a potential location of an external secondary boot source storing secondary boot code; and a processor operatively coupled to the primary boot source and to the plurality of input locations; wherein the processor is configured to, upon booting, automatically retrieve and execute the primary boot code from the primary boot source; and the primary boot code comprises at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip, the algorithm being configured so as when executed to operate the processor to check each of said locations to determine the location of the external secondary boot source, retrieve the secondary boot code from the determined location, and continue the booting by executing the secondary boot code. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A computer program product embodied on a computer-readable medium and comprising code which when executed on a processor performs the steps of:
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beginning booting of the processor from a primary boot source comprising a boot discovery algorithm, thus operating the processor to check each of a plurality of locations to determine the location of the external secondary boot source; retrieving the secondary boot code from the determined location; and continuing the booting of the processor by executing said secondary boot code on the processor.
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22. A user equipment comprising a wireless transceiver and an integrated circuit chip, the chip comprising:
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an on-chip storage means being a primary boot source storing primary boot code; a plurality of input locations each being a potential location of an external secondary boot source storing secondary boot code; and an operatively coupled to the primary boot source and to the plurality of input locations; wherein the processor is configured to, upon booting, automatically retrieve and execute the primary boot code from the primary boot source; and the primary boot code comprises at least a boot discovery algorithm for determining the location of an external secondary boot source external to said chip, the algorithm being configured so as when executed to operate the processor to check each of said locations to determine the location of the external secondary boot source, retrieve the secondary boot code from the determined location, and continue the booting by executing the secondary boot code in order to at least partially configure the processor for communication over a wireless cellular network via said wireless transceiver.
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Specification