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TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE

  • US 20100095185A1
  • Filed: 12/16/2009
  • Published: 04/15/2010
  • Est. Priority Date: 01/04/2006
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a physical layer unit having a forward error correction (FEC) sublayer to perform FEC using a transcode bit to represent a two bit synchronization header, said FEC sublayer having an FEC encoder to encode a physical coding sublayer (PCS) block by compressing said two bit synchronization header into said transcode bit, and to use one bit of the two bit synchronization header in the PCS block to send parity information, the parity information and transcode bit to be placed in an FEC block prior to transmission of the FEC block over a physical medium.

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