TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE
First Claim
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1. An apparatus, comprising:
- a physical layer unit having a forward error correction (FEC) sublayer to perform FEC using a transcode bit to represent a two bit synchronization header, said FEC sublayer having an FEC encoder to encode a physical coding sublayer (PCS) block by compressing said two bit synchronization header into said transcode bit, and to use one bit of the two bit synchronization header in the PCS block to send parity information, the parity information and transcode bit to be placed in an FEC block prior to transmission of the FEC block over a physical medium.
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Abstract
Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header. Other embodiments are described and claimed.
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Citations
20 Claims
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1. An apparatus, comprising:
a physical layer unit having a forward error correction (FEC) sublayer to perform FEC using a transcode bit to represent a two bit synchronization header, said FEC sublayer having an FEC encoder to encode a physical coding sublayer (PCS) block by compressing said two bit synchronization header into said transcode bit, and to use one bit of the two bit synchronization header in the PCS block to send parity information, the parity information and transcode bit to be placed in an FEC block prior to transmission of the FEC block over a physical medium. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method comprising
performing forward error correction (FEC) using a transcode bit to represent a two bit synchronization header, said performing comprising: -
encoding a physical coding sublayer (PCS) block of information by compressing said two bit synchronization header into said transcode bit; using one bit of the two bit synchronization header in the PCS block to send parity information; and placing said transcode bit and said parity information in an FEC block prior to transmission of the FEC block over a physical medium. - View Dependent Claims (10, 11, 12, 13, 14, 16, 17, 20)
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18. An article comprising a machine-readable storage medium containing instructions that if executed enable a system to
perform forward error correction (FEC) using a transcode bit to represent a two bit synchronization header by: -
encoding a physical coding sublayer (PCS) block of information by compressing said two bit synchronization header into said transcode bit; using one bit of the two bit synchronization header in the PCS block to send parity information; and placing said transcode bit and said parity information in an FEC block prior to transmission of the FEC block over a physical medium. - View Dependent Claims (19)
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Specification