THIN FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME

• US 20100096638A1
• Filed: 05/14/2009
• Published: 04/22/2010
• Est. Priority Date: 10/21/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Choi, Joon Hoo, Choo, Byoung Kwon, Park, Seung-Kyu, Moon, Sang-Ho, Park, Yong-Hwan, Cho, Kyu-Sik
• Granted Patent: US 8,860,032 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1296 adapted to increase the uniformity of device parameters
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785

Abstract

A thin film transistor substrate that includes a substrate, first and second gate electrodes that are formed on the substrate, a gate insulating layer that is formed on the first and second gate electrodes, a first semiconductor and a second semiconductor that are formed on the gate insulating layer, and that overlap the first gate electrode and the second gate electrode, respectively, a first source electrode and a first drain electrode that are formed on the first semiconductor, and positioned opposed to and spaced from each other, a source electrode connected to the first drain electrode and a second drain electrode positioned opposed to and spaced from the second source electrode, wherein the second source and second drain electrodes are formed on the second semiconductor, and a pixel electrode that is electrically connected to the second drain electrode, a method of manufacturing the same, and a display apparatus having the same.

Claims

1. A thin film transistor substrate, comprising:

a substrate;

first and second gate electrodes disposed on the substrate;

a gate insulating layer disposed on the first and second gate electrodes;

a first semiconductor and a second semiconductor disposed on the gate insulating layer, and overlapping the first gate electrode and the second gate electrode, respectively;

a first source electrode and a first drain electrode disposed on the first semiconductor, wherein the first source and first drain electrodes are positioned opposed to and spaced apart from each other;

a second source electrode connected to the first drain electrode and a second drain electrode positioned opposed to and spaced apart from the second source electrode, wherein the second source and second drain electrodes are disposed on the second semiconductor; and

a pixel electrode electrically connected to the second drain electrode.

2. The thin film transistor substrate of claim 1, further comprising an etch stopping layer disposed on each of the first and second semiconductors.

3. The thin film transistor substrate of claim 2, wherein the first semiconductor and the second semiconductor are formed of polycrystalline silicon.

4. The thin film transistor substrate of claim 3, wherein portions of the first source electrode and the first drain electrode overlap the etch stopping layer disposed on the first semiconductor and portions of the second drain electrode and second source electrode overlap the etch stopping layer disposed on the second semiconductor.

5. The thin film transistor substrate of claim 4, wherein portions of the first source electrode and the first drain electrode overlap the first gate electrode, and portions of the second source electrode and the second drain electrode overlap the second gate electrode.

6. The thin film transistor substrate of claim 1, wherein the first source electrode and the first drain electrode are spaced apart from the first gate electrode by a predetermined gap when the first source electrode and the first drain electrode are projected on the same plane as the first gate electrode, and the second source electrode and the second drain electrode are spaced apart from the second gate electrode by a predetermined gap when the second source electrode and the second drain electrode are projected on the same plane as the second gate electrode.

7. The thin film transistor substrate of claim 1, further comprising

ohmic contact layers disposed between the first source electrode and first drain electrode, and the first semiconductor, and between the second source electrode and second drain electrode, and the second semiconductor.

8. The thin film transistor substrate of claim 7, wherein the ohmic contact layers have the same planar shape as the first source electrode and the first drain electrode, and the second source electrode and the second drain electrode.

9. The thin film transistor substrate of claim 1, wherein a positional relationship of the first source electrode and the first drain electrode with respect to the first gate electrode is opposite to a positional relationship of the second source electrode and the second drain electrode with respect to the second gate electrode.

10. The thin film transistor substrate of claim 9, wherein the first and second gate electrodes, the first and second source electrodes, and the first and second drain electrodes are positioned along the substrate in the order of the first source electrode, the first gate electrode, the first drain electrode, the second drain electrode, the second gate electrode, and the second source electrode.

11. An organic light emitting display apparatus, comprising:

a substrate;

first and second gate electrodes disposed on the substrate;

a gate insulating layer disposed on the first and second gate electrodes;

a first semiconductor and a second semiconductor disposed on the gate insulating layer, and overlapping the first gate electrode and the second gate electrode, respectively;

a first source electrode and a first drain electrode disposed on the first semiconductor, and positioned opposed to and spaced apart from each other;

a second source electrode connected to the first drain electrode and a second drain electrode positioned opposed to and spaced apart from the second source electrode, wherein the second source and second drain electrodes are disposed on the second semiconductor;

a driving transistor electrically connected to the second drain electrode; and

a pixel electrode electrically connected to the driving transistor.

12. The organic light emitting display apparatus of claim 11, wherein a positional relationship of the first source electrode and the first drain electrode with respect to the first gate electrode is opposite to a positional relationship of the second source electrode and the second drain electrode with respect to the second gate electrode.

13. The organic light emitting display apparatus of claim 12, wherein the first and second gate electrodes, the first and second source electrodes, and the first and second drain electrodes are positioned along the substrate in the order of the first source electrode, the first gate electrode, the first drain electrode, the second drain electrode, the second gate electrode, and the second source electrode.

14. A method of manufacturing a thin film transistor substrate, comprising:

forming first and second gate electrodes on a substrate;

forming a gate insulating layer on the first gate electrode and the second gate electrode;

forming a first semiconductor and a second semiconductor that correspond to the first gate electrode and the second gate electrode, respectively, on the gate insulating layer;

forming a first source electrode and a first drain electrode on the first semiconductor, forming a second source electrode connected to the first drain electrode on the second semiconductor, and forming a second drain electrode on the second semiconductor, wherein the second drain electrode is positioned opposed to the second source electrode; and

forming a pixel electrode electrically connected to the second drain electrode.

15. The method of claim 14, further comprising

forming an etch stopping layer on each of the first semiconductor and the second semiconductor.

16. The method of claim 15, further comprising

forming ohmic contact layers between the first source electrode and first drain electrode, and the first semiconductor, and between the second source electrode and second drain electrode, and the second semiconductor.

17. The method of claim 16, wherein the ohmic contact layers, the first source electrode, the second source electrode, the first drain electrode, and the second drain electrode are formed by the same photolithography process.

18. The method of claim 14, wherein a positional relationship of the first source electrode and the first drain electrode with respect to the first gate electrode is opposite to a positional relationship of the second source electrode and the second drain electrode with respect to the second gate electrode.

19. The method of claim 18, wherein the first and second gate electrodes, the first and second source electrodes, and the first and second drain electrodes are positioned along the substrate in the order of the first source electrode, the first gate electrode, the first drain electrode, the second drain electrode, the second gate electrode, and the second source electrode.