ELECTRONIC DEVICE INCLUDING TRENCHES AND DISCONTINUOUS STORAGE ELEMENTS

• US 20100096686A1
• Filed: 12/24/2009
• Published: 04/22/2010
• Est. Priority Date: 01/24/2007
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Li, Chi-Nan, Hong, Cheong Min
• Granted Patent: US 8,193,572 B2
• Time in Patent Office: Days
• US Class Current: 257/316
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42332 with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H10B 41/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

Claims

1. An electronic device comprising:

a substrate including a portion that defines a first trench having a first bottom and a first wall;

a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench;

a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench; and

discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench.

2. The electronic device of claim 1, wherein the first gate electrode lies between the second gate electrode and the first wall of the first trench.

3. The electronic device of claim 2, wherein the first set of the discontinuous storage elements also lies between the first gate electrode and the first wall of the first trench.

4. The electronic device of claim 2, wherein the first set of the discontinuous storage elements also lies between the first gate electrode and the second gate electrode.

5. The electronic device of claim 2, wherein the first set of the discontinuous storage elements only lies between the second gate electrode and the bottom of the first trench.

6. The electronic device of claim 2, further comprising a first source/drain region and a second source/drain region, wherein:

the substrate has a primary surface;

the first source/drain region lies adjacent to the primary surface and the first wall of the first trench; and

the second source/drain region lies adjacent to the bottom of the first trench and is spaced apart from the first wall of the first trench.

7. The electronic device of claim 1, wherein each of the first gate electrode and the second gate electrode has a shape, which from a cross-sectional view, is a sidewall spacer.

8. The electronic device of claim 1, further comprising a third gate electrode and a fourth gate electrode, wherein:

a substrate including another portion that defines a second trench having a second bottom and a second wall;

the third gate electrode lies within the second trench and adjacent to the second wall and overlying the second bottom of the second trench;

the fourth gate electrode lies within the second trench and adjacent to the third gate electrode and overlying the second bottom of the second trench; and

the discontinuous storage elements including a second set of discontinuous storage elements, wherein the second set of the discontinuous storage elements lies between (i) the second bottom of the second trench and (ii) the third gate electrode or the fourth gate electrode.

9. The electronic device of claim 8, further comprising a first source/drain region, a second source/drain region, and a third source/drain region, wherein:

the substrate has a primary surface;

the first source/drain region lies adjacent to the primary surface, the first wall of the first trench, and the second wall of the second trench;

the second source/drain region lies adjacent to the bottom of the first trench, is spaced apart from the first wall of the first trench; and

the third source/drain region lies adjacent to the bottom of the second trench and is spaced apart from the second wall of the second trench.

10. The electronic device of claim 9, wherein:

the first gate electrode lies between the first wall of the first trench and the second gate electrode;

the first set of the discontinuous storage elements also lies between the first wall of the first trench and the first gate electrode;

the third gate electrode lies between the second wall of the second trench and the fourth gate electrode; and

the second set of the discontinuous storage elements also lies between the second wall of the second trench and the third gate electrode.

11. An electronic device comprising:

a substrate including a portion that defines a first trench having a bottom and a wall;

a first gate electrode within the first trench and adjacent to the wall and overlying the bottom of the first trench;

a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the bottom of the first trench; and

discontinuous storage elements including a set of discontinuous storage elements, wherein the set of the discontinuous storage elements lies between the first gate electrode and the bottom of the first trench.

12. The electronic device of claim 11, wherein the set of discontinuous storage elements lies between the first gate electrode and the wall of the first trench.

13. The electronic device of claim 11, wherein substantially no discontinuous storage element lies between a bottom surface of the second gate electrode and the bottom of the first trench.

14. The electronic device of claim 11, wherein:

the substrate including other portions that define other trenches;

the discontinuous storage elements include other sets of discontinuous storage elements lying within the other trenches; and

substantially all of the discontinuous storage elements lie within the first and other trenches.

15. An electronic device comprising:

a substrate including a portion that defines a first trench having a bottom and a wall;

a first gate electrode within the first trench and adjacent to the wall and overlying the bottom of the first trench;

a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the bottom of the first trench; and

discontinuous storage elements including a set of discontinuous storage elements, wherein the set of the discontinuous storage elements lies between the second gate electrode and the bottom of the first trench.

16. The electronic device of claim 15, wherein the set of discontinuous storage elements is spaced apart from the wall of the first trench.

17. The electronic device of claim 16, wherein substantially no discontinuous storage element lies between the first gate electrode and the wall of the first trench.

18. The electronic device of claim 17, wherein substantially no discontinuous storage element lies between the first gate electrode and the bottom of the first trench.

19. The electronic device of claim 15, wherein substantially no discontinuous storage element lies between the first gate electrode and the bottom of the first trench.

20. The electronic device of claim 15, wherein:

the substrate including other portions that define other trenches;

the discontinuous storage elements include other sets of discontinuous storage elements lying within the other trenches; and

substantially all of the discontinuous storage elements lie within the first and other trenches.