INTEGRATED CIRCUIT DEVICE AND METHOD

• US 20100099223A1
• Filed: 10/19/2009
• Published: 04/22/2010
• Est. Priority Date: 11/01/2007
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Mahler, Joachim, Galesic, Ivan, Behrens, Thomas
• Granted Patent: US 8,187,964 B2
• Time in Patent Office: Days
• US Class Current: 438/127
• CPC Class Codes: H01L 23/3171 the coating being directly applied to the semiconductor body, e.g. passivation layer H01L23/3178 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An integrated circuit device includes a semiconductor chip with a metallization layer on the chip. A gas-phase deposited insulation layer is disposed on the metallization layer.

Claims

1. A method for producing an integrated circuit device, comprising:

providing a semiconductor chip;

applying a metallization layer to the semiconductor chip;

applying an insulation layer over the metallization layer by a gas-phase deposition.

2. The method of claim 1, wherein applying the insulation layer includes depositing an inorganic precursor.

3. The method of claim 1, further comprising structuring the insulation layer.

4. The method of claim 3, wherein structuring the insulation layer includes depositing a mask layer.

5. The method of claim 3, wherein structuring the insulation layer includes a photolithographic process.

6. The method of claim 3, wherein structuring the insulation layer includes laser ablation.

7. The method of claim 1, further comprising encapsulating the integrated circuit device.

8. The method of claim 1, wherein the gas-phase deposition includes a chemical vapor deposition (CVD) process.

9. The method of claim 1, wherein the gas-phase deposition includes a plasma enhanced chemical vapor deposition (PE-CVD) process.

10. The method of claim 1, further comprising applying an adhesion promoting layer over the insulation layer.

11. The method of claim 10, wherein applying the adhesion promoting layer includes a gas phase deposition of silane.