Rapid Thermal Processing using Energy Transfer Layers

• US 20100099268A1
• Filed: 12/05/2009
• Published: 04/22/2010
• Est. Priority Date: 04/08/2005
• Status: Active Grant

• Current Assignee: Mattson Technology, Inc. (Beijing Economic & Technology Development Area), BeiJing E-Town Semiconductor Technology Co., Ltd.
• Original Assignee: Mattson Technology, Inc. (Beijing Economic & Technology Development Area)
• Inventors: Timans, Paul J.
• Granted Patent: US 8,138,105 B2
• Time in Patent Office: Days
• US Class Current: 438/761
• CPC Class Codes: H01L 21/67115 mainly by radiation

Abstract

A method that is performed for heat treating a semiconductor wafer in a process chamber, as an intermediate part of an overall multi-step technique for processing the wafer, includes applying an energy transfer layer to at least a portion of the wafer, and exposing the wafer to an energy source in the process chamber in a way which subjects the wafer to a thermal profile such that the energy transfer layer influences at least one part of the thermal profile. The thermal profile has at least a first elevated temperature event. The method further includes, in time relation to the thermal profile, removing the energy transfer layer in the process chamber at least sufficiently for subjecting the wafer to a subsequent step. An associated intermediate condition of the wafer is described.

Claims

1. In an overall multi-step technique for processing a semiconductor wafer which includes a pair of opposing major surfaces one of which is a front side surface, being a device side, and the other one of which is a back side surface, a method that is performed as part of annealing said wafer in a process chamber as an intermediate part of the overall multi-step technique, said method comprising:

exposing at least one of said major surfaces of the wafer to a pulse of energy having a duration of less than 100 milliseconds at any given exposed location on the major surface in said process chamber in a way that at least contributes to annealing the front side surface of the wafer and which produces a first stress response of the wafer; and

subjecting the wafer to an additional source of stress to produce an overall modified stress response that compensates for said first stress response such that a modified probability of survivability of the wafer is enhanced as compared to an unmodified survivability that would otherwise be presented by the wafer resulting from only the first stress response.

2. The method of claim 1 wherein subjecting the wafer to the additional source of stress includes irradiating the back side surface of the wafer with an additional pulse of energy as said additional source of stress.

3. The method of claim 1 including applying a stress control layer to at least a portion of one of the major surfaces of the wafer prior to said exposing such that the stress control layer serves as said additional source of stress.

4. The method of claim 3 wherein applying forms the stress control layer on the back side surface of the wafer.

5. The method of claim 1 including mechanically supporting said wafer during said exposing in a way that causes a mechanical support arrangement to serve as said additional source of stress.

6. The method of claim 1 wherein exposing applies a laser pulse of energy from a laser as said pulse of energy.

7. The method of claim 6 wherein said laser produces an energy beam and exposing includes sweeping the energy beam of the laser across the major surface of the wafer to produce the pulse of energy.

8. The method of claim 1 wherein exposing includes producing the pulse of energy from a pulsed arc lamp.

9. In an overall multi-step technique for processing a semiconductor wafer which includes a pair of opposing major surfaces one of which is a front side surface and the other one of which is a back side surface, a method that is performed as part of annealing said wafer in a process chamber as an intermediate part of the overall multi-step technique, said method comprising:

exposing said major surfaces of said wafer substantially simultaneously to a pulsed energy source in said process chamber to anneal the front side of the wafer in order to change at least one characteristic of the wafer to a modified characteristic and to produce a controlled stress behavior responsive to the exposing such that the controlled stress behavior enhances survivability of the wafer as compared to exposing only the front side of the wafer to the energy source.

10. The method of claim 9 wherein exposing applies a laser pulse of energy from a laser to at least one of the major surfaces as the pulsed energy source.

11. The method of claim 10 wherein said laser produces an energy beam and exposing includes sweeping the energy beam of the laser across the major surface of the wafer to produce the laser pulse of energy.

12. The method of claim 9 wherein exposing applies a pulse of energy produced by a pulsed arc lamp.

13. The method of claim 12 wherein the pulse of energy is characterized by a duration of less than 100 milliseconds.

14. In an overall multi-step technique for processing a semiconductor wafer which includes a pair of opposing major surfaces, a method that is performed as part of annealing said wafer in a process chamber as an intermediate part of the overall multi-step technique, said method comprising:

applying a stress control layer to at least a portion of at least one of the major surfaces of said wafer;

exposing said wafer to a pulse of energy having a duration of less than 100 milliseconds at any given exposed location on the wafer to anneal the wafer in order to change at least one characteristic of the wafer to a modified characteristic, and where said exposing subjects the wafer to a thermal profile having at least a first elevated temperature event such that the wafer would respond to the energy source with a given stress behavior without the stress control layer and the wafer exhibits a modified stress behavior as a result of the presence of the stress control layer such that survivability of the wafer is enhanced responsive to said exposing; and

removing said stress control layer at least sufficiently for subjecting the wafer to a subsequent step.

15. The method of claim 14 wherein the stress control layer is applied to a first area of a first one of said major surfaces and an additional stress control layer is applied to at least a second area of a second, opposing one of the major surfaces to further change said modified stress behavior to further reduce the probability of damage to the wafer due to said exposing.

16. The method of claim 14 wherein the wafer would respond to said exposing with a given deformation as a result of the given stress behavior and including configuring the stress control layer to produce a modified deformation that is less than the given deformation in response to said exposing.

17. The method of claim 14 wherein the wafer would exhibit a given temperature distribution responsive to said exposing and said control layer produces a modified temperature distribution that produces the modified stress behavior.

18. The method of claim 14 wherein exposing applies a laser pulse of energy from a laser to at least one major surface of the wafer to anneal the wafer.

19. The method of claim 14 wherein said laser produces an energy beam and exposing includes sweeping the energy beam of the laser across the major surface of the wafer to produce the pulse of energy.

20. The method of claim 14 wherein exposing includes producing the pulse of energy from a pulsed arc lamp and subjecting the wafer to the pulse of energy.